:: FTACELL1 semantic presentation begin definition let ap, bp, cp, dp, cin be set ; func BitFTA0Str (ap,bp,cp,dp,cin) -> non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign equals :: FTACELL1:def 1 (BitGFA0Str (ap,bp,cp)) +* (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)); coherence (BitGFA0Str (ap,bp,cp)) +* (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) is non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign ; end; :: deftheorem defines BitFTA0Str FTACELL1:def_1_:_ for ap, bp, cp, dp, cin being set holds BitFTA0Str (ap,bp,cp,dp,cin) = (BitGFA0Str (ap,bp,cp)) +* (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)); definition let ap, bp, cp, dp, cin be set ; func BitFTA0Circ (ap,bp,cp,dp,cin) -> strict gate`2=den Boolean Circuit of BitFTA0Str (ap,bp,cp,dp,cin) equals :: FTACELL1:def 2 (BitGFA0Circ (ap,bp,cp)) +* (BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp)); coherence (BitGFA0Circ (ap,bp,cp)) +* (BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) is strict gate`2=den Boolean Circuit of BitFTA0Str (ap,bp,cp,dp,cin) ; end; :: deftheorem defines BitFTA0Circ FTACELL1:def_2_:_ for ap, bp, cp, dp, cin being set holds BitFTA0Circ (ap,bp,cp,dp,cin) = (BitGFA0Circ (ap,bp,cp)) +* (BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp)); theorem Th1: :: FTACELL1:1 for ap, bp, cp, dp, cin being set holds InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = (({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} proof let ap, bp, cp, dp, cin be set ; ::_thesis: InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = (({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} set S = BitFTA0Str (ap,bp,cp,dp,cin); set S1 = BitGFA0Str (ap,bp,cp); set A1 = GFA0AdderOutput (ap,bp,cp); set C1 = GFA0CarryOutput (ap,bp,cp); set S2 = BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set A2 = GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set C2 = GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set apbp0 = [<*ap,bp*>,xor2]; set apbp = [<*ap,bp*>,and2]; set bpcp = [<*bp,cp*>,and2]; set cpap = [<*cp,ap*>,and2]; set A1cin0 = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]; set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2]; set cindp = [<*cin,dp*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; BitGFA0Str (ap,bp,cp) tolerates BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp) by CIRCCOMB:47; hence InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = (InnerVertices (BitGFA0Str (ap,bp,cp))) \/ (InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) by CIRCCOMB:11 .= ((({[<*ap,bp*>,xor2]} \/ {(GFA0AdderOutput (ap,bp,cp))}) \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2]}) \/ {(GFA0CarryOutput (ap,bp,cp))}) \/ (InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) by GFACIRC1:31 .= (({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2]}) \/ {(GFA0CarryOutput (ap,bp,cp))}) \/ (InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) by ENUMSET1:1 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ ({[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2]} \/ {(GFA0CarryOutput (ap,bp,cp))})) \/ (InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) by XBOOLE_1:4 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ (InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) by ENUMSET1:6 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ ((({[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]} \/ {(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]}) \/ {(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) by GFACIRC1:31 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ (({[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]}) \/ {(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) by ENUMSET1:1 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ ({[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} \/ ({[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]} \/ {(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))})) by XBOOLE_1:4 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ ({[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) by ENUMSET1:6 .= (({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} by XBOOLE_1:4 ; ::_thesis: verum end; theorem :: FTACELL1:2 for ap, bp, cp, dp, cin being set holds InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) is Relation proof let ap, bp, cp, dp, cin be set ; ::_thesis: InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) is Relation set S1 = BitGFA0Str (ap,bp,cp); set A1 = GFA0AdderOutput (ap,bp,cp); set S2 = BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp); ( InnerVertices (BitGFA0Str (ap,bp,cp)) is Relation & InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) is Relation ) by GFACIRC1:32; hence InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) is Relation by FACIRC_1:3; ::_thesis: verum end; Lm1: for x, y, z, p being set holds GFA0AdderOutput (x,y,z) <> [p,and2] proof let x, y, z be set ; ::_thesis: for p being set holds GFA0AdderOutput (x,y,z) <> [p,and2] let p be set ; ::_thesis: GFA0AdderOutput (x,y,z) <> [p,and2] set A1 = GFA0AdderOutput (x,y,z); now__::_thesis:_not_[p,and2]_`2_=_(GFA0AdderOutput_(x,y,z))_`2 assume [p,and2] `2 = (GFA0AdderOutput (x,y,z)) `2 ; ::_thesis: contradiction then A1: [p,and2] `2 = xor2 by MCART_1:7; thus contradiction by A1, TWOSCOMP:9, TWOSCOMP:11; ::_thesis: verum end; hence GFA0AdderOutput (x,y,z) <> [p,and2] ; ::_thesis: verum end; Lm2: for ap, bp, cp being non pair set for x, y, z being set holds InputVertices (BitGFA0Str (ap,bp,cp)) misses InnerVertices (BitGFA0Str (x,y,z)) proof let ap, bp, cp be non pair set ; ::_thesis: for x, y, z being set holds InputVertices (BitGFA0Str (ap,bp,cp)) misses InnerVertices (BitGFA0Str (x,y,z)) let x, y, z be set ; ::_thesis: InputVertices (BitGFA0Str (ap,bp,cp)) misses InnerVertices (BitGFA0Str (x,y,z)) set S1 = BitGFA0Str (ap,bp,cp); InputVertices (BitGFA0Str (ap,bp,cp)) is without_pairs by GFACIRC1:35; hence InputVertices (BitGFA0Str (ap,bp,cp)) misses InnerVertices (BitGFA0Str (x,y,z)) by FACIRC_1:5, GFACIRC1:32; ::_thesis: verum end; theorem Th3: :: FTACELL1:3 for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = {ap,bp,cp,dp,cin} proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = {ap,bp,cp,dp,cin} let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) implies InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = {ap,bp,cp,dp,cin} ) set S = BitFTA0Str (ap,bp,cp,dp,cin); set S1 = BitGFA0Str (ap,bp,cp); set A1 = GFA0AdderOutput (ap,bp,cp); set C1 = GFA0CarryOutput (ap,bp,cp); set S2 = BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set apbp0 = [<*ap,bp*>,xor2]; set apbp = [<*ap,bp*>,and2]; set bpcp = [<*bp,cp*>,and2]; set cpap = [<*cp,ap*>,and2]; set cindp = [<*cin,dp*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; assume that A1: cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] and A2: not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) ; ::_thesis: InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = {ap,bp,cp,dp,cin} A3: not dp in {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} by ENUMSET1:def_4; GFA0AdderOutput (ap,bp,cp) in {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} by ENUMSET1:def_4; then A4: {(GFA0AdderOutput (ap,bp,cp))} \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} = {} by ZFMISC_1:60; A5: InnerVertices (BitGFA0Str (ap,bp,cp)) = (({[<*ap,bp*>,xor2]} \/ {(GFA0AdderOutput (ap,bp,cp))}) \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2]}) \/ {(GFA0CarryOutput (ap,bp,cp))} by GFACIRC1:31 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2]}) \/ {(GFA0CarryOutput (ap,bp,cp))} by ENUMSET1:1 .= {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ ({[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2]} \/ {(GFA0CarryOutput (ap,bp,cp))}) by XBOOLE_1:4 .= {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2]} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} by ENUMSET1:6 .= {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} by ENUMSET1:12 ; then A6: {(GFA0AdderOutput (ap,bp,cp)),cin,dp} \ (InnerVertices (BitGFA0Str (ap,bp,cp))) = ({(GFA0AdderOutput (ap,bp,cp))} \/ {cin,dp}) \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} by ENUMSET1:2 .= ({(GFA0AdderOutput (ap,bp,cp))} \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ ({cin,dp} \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) by XBOOLE_1:42 .= ({cin} \/ {dp}) \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} by A4, ENUMSET1:1 .= ({cin} \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ ({dp} \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) by XBOOLE_1:42 .= {cin} \/ ({dp} \ {(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,xor2],[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) by A2, A5, ZFMISC_1:59 .= {cin} \/ {dp} by A3, ZFMISC_1:59 .= {cin,dp} by ENUMSET1:1 ; A7: GFA0AdderOutput (ap,bp,cp) <> [<*cin,dp*>,and2] by Lm1; ( InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) misses InputVertices (BitGFA0Str (ap,bp,cp)) & BitGFA0Str (ap,bp,cp) tolerates BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp) ) by Lm2, CIRCCOMB:47; hence InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = (InputVertices (BitGFA0Str (ap,bp,cp))) \/ ((InputVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) \ (InnerVertices (BitGFA0Str (ap,bp,cp)))) by FACIRC_1:4 .= {ap,bp,cp} \/ ((InputVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) \ (InnerVertices (BitGFA0Str (ap,bp,cp)))) by GFACIRC1:34 .= {ap,bp,cp} \/ ({(GFA0AdderOutput (ap,bp,cp)),cin,dp} \ (InnerVertices (BitGFA0Str (ap,bp,cp)))) by A1, A7, GFACIRC1:33 .= {ap,bp,cp,dp,cin} by A6, ENUMSET1:9 ; ::_thesis: verum end; theorem Th4: :: FTACELL1:4 for ap, bp, cp, dp, cin being set holds ( ap in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,xor2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*bp,cp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cp,ap*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cin,dp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) ) proof let ap, bp, cp, dp, cin be set ; ::_thesis: ( ap in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,xor2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*bp,cp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cp,ap*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cin,dp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) ) set S1 = BitGFA0Str (ap,bp,cp); set A1 = GFA0AdderOutput (ap,bp,cp); set C1 = GFA0CarryOutput (ap,bp,cp); set S2 = BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set A2 = GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set C2 = GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set apbp0 = [<*ap,bp*>,xor2]; set apbp = [<*ap,bp*>,and2]; set bpcp = [<*bp,cp*>,and2]; set cpap = [<*cp,ap*>,and2]; set A1cin0 = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]; set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2]; set cindp = [<*cin,dp*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; A1: ( cp in the carrier of (BitGFA0Str (ap,bp,cp)) & [<*ap,bp*>,xor2] in the carrier of (BitGFA0Str (ap,bp,cp)) ) by GFACIRC1:36; A2: ( [<*ap,bp*>,and2] in the carrier of (BitGFA0Str (ap,bp,cp)) & [<*bp,cp*>,and2] in the carrier of (BitGFA0Str (ap,bp,cp)) ) by GFACIRC1:36; A3: ( GFA0AdderOutput (ap,bp,cp) in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) & cin in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) ) by GFACIRC1:36; A4: ( [<*cp,ap*>,and2] in the carrier of (BitGFA0Str (ap,bp,cp)) & GFA0CarryOutput (ap,bp,cp) in the carrier of (BitGFA0Str (ap,bp,cp)) ) by GFACIRC1:36; A5: GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) by GFACIRC1:36; A6: ( [<*cin,dp*>,and2] in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) & [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) ) by GFACIRC1:36; A7: ( GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) ) by GFACIRC1:36; A8: ( dp in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) ) by GFACIRC1:36; ( ap in the carrier of (BitGFA0Str (ap,bp,cp)) & bp in the carrier of (BitGFA0Str (ap,bp,cp)) ) by GFACIRC1:36; hence ( ap in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,xor2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*bp,cp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cp,ap*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cin,dp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, A2, A4, A3, A8, A7, A6, A5, FACIRC_1:20; ::_thesis: verum end; theorem Th5: :: FTACELL1:5 for ap, bp, cp, dp, cin being set holds ( [<*ap,bp*>,xor2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput (ap,bp,cp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*bp,cp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cp,ap*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput (ap,bp,cp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cin,dp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) proof let ap, bp, cp, dp, cin be set ; ::_thesis: ( [<*ap,bp*>,xor2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput (ap,bp,cp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*bp,cp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cp,ap*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput (ap,bp,cp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cin,dp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) set S = BitFTA0Str (ap,bp,cp,dp,cin); set A1 = GFA0AdderOutput (ap,bp,cp); set C1 = GFA0CarryOutput (ap,bp,cp); set A2 = GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set C2 = GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set apbp0 = [<*ap,bp*>,xor2]; set apbp = [<*ap,bp*>,and2]; set bpcp = [<*bp,cp*>,and2]; set cpap = [<*cp,ap*>,and2]; set A1cin0 = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]; set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2]; set cindp = [<*cin,dp*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; set p1 = {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}; set p2 = {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}; A1: ( [<*ap,bp*>,xor2] in {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} & GFA0AdderOutput (ap,bp,cp) in {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} ) by ENUMSET1:def_4; A2: ( [<*ap,bp*>,and2] in {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} & [<*bp,cp*>,and2] in {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} ) by ENUMSET1:def_4; A3: ( [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} & GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} ) by ENUMSET1:def_4; A4: ( [<*cp,ap*>,and2] in {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} & GFA0CarryOutput (ap,bp,cp) in {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} ) by ENUMSET1:def_4; A5: ( [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} & GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} ) by ENUMSET1:def_4; A6: ( [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} & [<*cin,dp*>,and2] in {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} ) by ENUMSET1:def_4; InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = (({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp))} \/ {[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} by Th1 .= ({[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} by ENUMSET1:12 .= {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} \/ ({[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))}) by XBOOLE_1:4 .= {[<*ap,bp*>,xor2],(GFA0AdderOutput (ap,bp,cp)),[<*ap,bp*>,and2],[<*bp,cp*>,and2],[<*cp,ap*>,and2],(GFA0CarryOutput (ap,bp,cp))} \/ {[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],(GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)),[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2],(GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp))} by ENUMSET1:12 ; hence ( [<*ap,bp*>,xor2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput (ap,bp,cp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*ap,bp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*bp,cp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cp,ap*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput (ap,bp,cp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cin,dp*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, A2, A4, A3, A6, A5, XBOOLE_0:def_3; ::_thesis: verum end; theorem Th6: :: FTACELL1:6 for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) implies ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) ) set S = BitFTA0Str (ap,bp,cp,dp,cin); set S1 = BitGFA0Str (ap,bp,cp); set A1 = GFA0AdderOutput (ap,bp,cp); set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; assume ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) ) ; ::_thesis: ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) then InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = {ap,bp,cp,dp,cin} by Th3; hence ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by ENUMSET1:def_3; ::_thesis: verum end; definition let ap, bp, cp, dp, cin be set ; func BitFTA0CarryOutput (ap,bp,cp,dp,cin) -> Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) equals :: FTACELL1:def 3 GFA0CarryOutput (ap,bp,cp); coherence GFA0CarryOutput (ap,bp,cp) is Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; func BitFTA0AdderOutputI (ap,bp,cp,dp,cin) -> Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) equals :: FTACELL1:def 4 GFA0AdderOutput (ap,bp,cp); coherence GFA0AdderOutput (ap,bp,cp) is Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; func BitFTA0AdderOutputP (ap,bp,cp,dp,cin) -> Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) equals :: FTACELL1:def 5 GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); coherence GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) is Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; func BitFTA0AdderOutputQ (ap,bp,cp,dp,cin) -> Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) equals :: FTACELL1:def 6 GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); coherence GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) is Element of InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; end; :: deftheorem defines BitFTA0CarryOutput FTACELL1:def_3_:_ for ap, bp, cp, dp, cin being set holds BitFTA0CarryOutput (ap,bp,cp,dp,cin) = GFA0CarryOutput (ap,bp,cp); :: deftheorem defines BitFTA0AdderOutputI FTACELL1:def_4_:_ for ap, bp, cp, dp, cin being set holds BitFTA0AdderOutputI (ap,bp,cp,dp,cin) = GFA0AdderOutput (ap,bp,cp); :: deftheorem defines BitFTA0AdderOutputP FTACELL1:def_5_:_ for ap, bp, cp, dp, cin being set holds BitFTA0AdderOutputP (ap,bp,cp,dp,cin) = GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); :: deftheorem defines BitFTA0AdderOutputQ FTACELL1:def_6_:_ for ap, bp, cp, dp, cin being set holds BitFTA0AdderOutputQ (ap,bp,cp,dp,cin) = GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); theorem :: FTACELL1:7 for ap, bp, cp being non pair set for dp, cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp holds ( (Following (s,2)) . (BitFTA0CarryOutput (ap,bp,cp,dp,cin)) = ((a1 '&' a2) 'or' (a2 '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 ) proof let ap, bp, cp be non pair set ; ::_thesis: for dp, cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp holds ( (Following (s,2)) . (BitFTA0CarryOutput (ap,bp,cp,dp,cin)) = ((a1 '&' a2) 'or' (a2 '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 ) let dp, cin be set ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp holds ( (Following (s,2)) . (BitFTA0CarryOutput (ap,bp,cp,dp,cin)) = ((a1 '&' a2) 'or' (a2 '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 ) let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp holds ( (Following (s,2)) . (BitFTA0CarryOutput (ap,bp,cp,dp,cin)) = ((a1 '&' a2) 'or' (a2 '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 ) set S1 = BitGFA0Str (ap,bp,cp); set C1 = BitGFA0Circ (ap,bp,cp); set A1 = GFA0AdderOutput (ap,bp,cp); set A2 = GFA0CarryOutput (ap,bp,cp); set S2 = BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set C2 = BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp); let a1, a2, a3 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bp & a3 = s . cp implies ( (Following (s,2)) . (BitFTA0CarryOutput (ap,bp,cp,dp,cin)) = ((a1 '&' a2) 'or' (a2 '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 ) ) assume that A1: a1 = s . ap and A2: a2 = s . bp and A3: a3 = s . cp ; ::_thesis: ( (Following (s,2)) . (BitFTA0CarryOutput (ap,bp,cp,dp,cin)) = ((a1 '&' a2) 'or' (a2 '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 ) reconsider s1 = s | the carrier of (BitGFA0Str (ap,bp,cp)) as State of (BitGFA0Circ (ap,bp,cp)) by FACIRC_1:26; A4: dom s1 = the carrier of (BitGFA0Str (ap,bp,cp)) by CIRCUIT1:3; ap in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then A5: a1 = s1 . ap by A1, A4, FUNCT_1:47; reconsider t = s as State of ((BitGFA0Circ (ap,bp,cp)) +* (BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) ; A6: InputVertices (BitGFA0Str (ap,bp,cp)) misses InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) by Lm2; cp in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then A7: a3 = s1 . cp by A3, A4, FUNCT_1:47; bp in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then A8: a2 = s1 . bp by A2, A4, FUNCT_1:47; GFA0CarryOutput (ap,bp,cp) in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then (Following (t,2)) . (GFA0CarryOutput (ap,bp,cp)) = (Following (s1,2)) . (GFA0CarryOutput (ap,bp,cp)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA0CarryOutput (ap,bp,cp,dp,cin)) = ((a1 '&' a2) 'or' (a2 '&' a3)) 'or' (a3 '&' a1) by A5, A8, A7, GFACIRC1:39; ::_thesis: (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 GFA0AdderOutput (ap,bp,cp) in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then (Following (t,2)) . (GFA0AdderOutput (ap,bp,cp)) = (Following (s1,2)) . (GFA0AdderOutput (ap,bp,cp)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA0AdderOutputI (ap,bp,cp,dp,cin)) = (a1 'xor' a2) 'xor' a3 by A5, A8, A7, GFACIRC1:39; ::_thesis: verum end; theorem Th8: :: FTACELL1:8 for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) implies for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) ) ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) set A1 = GFA0AdderOutput (ap,bp,cp); set C1 = BitGFA0Circ (ap,bp,cp); set S1 = BitGFA0Str (ap,bp,cp); set S2 = BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set C2 = BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set S = BitFTA0Str (ap,bp,cp,dp,cin); let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin implies ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) ) assume that A2: a1 = s . ap and A3: a2 = s . bp and A4: a3 = s . cp and A5: a4 = s . dp and A6: a5 = s . cin ; ::_thesis: ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) reconsider s1 = s | the carrier of (BitGFA0Str (ap,bp,cp)) as State of (BitGFA0Circ (ap,bp,cp)) by FACIRC_1:26; A7: dom s1 = the carrier of (BitGFA0Str (ap,bp,cp)) by CIRCUIT1:3; A8: dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; then A9: (Following s) . dp = a4 by A5, CIRCUIT2:def_5; A10: cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; then A11: (Following s) . cp = a3 by A4, CIRCUIT2:def_5; bp in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then A12: a2 = s1 . bp by A3, A7, FUNCT_1:47; reconsider t = s as State of ((BitGFA0Circ (ap,bp,cp)) +* (BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp))) ; ( GFA0AdderOutput (ap,bp,cp) in the carrier of (BitGFA0Str (ap,bp,cp)) & InputVertices (BitGFA0Str (ap,bp,cp)) misses InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) ) by Lm2, GFACIRC1:36; then A13: (Following (t,2)) . (GFA0AdderOutput (ap,bp,cp)) = (Following (s1,2)) . (GFA0AdderOutput (ap,bp,cp)) by FACIRC_1:32; cp in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then A14: a3 = s1 . cp by A4, A7, FUNCT_1:47; ap in the carrier of (BitGFA0Str (ap,bp,cp)) by GFACIRC1:36; then a1 = s1 . ap by A2, A7, FUNCT_1:47; hence (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 by A12, A14, A13, GFACIRC1:39; ::_thesis: ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) A15: bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; then A16: (Following s) . bp = a2 by A3, CIRCUIT2:def_5; A17: cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; then A18: (Following s) . cin = a5 by A6, CIRCUIT2:def_5; A19: ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; then ( Following (s,2) = Following (Following s) & (Following s) . ap = a1 ) by A2, CIRCUIT2:def_5, FACIRC_1:15; hence ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) by A19, A15, A10, A8, A17, A16, A11, A9, A18, CIRCUIT2:def_5; ::_thesis: verum end; Lm3: for ap, bp, cp, dp being non pair set for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) let cin be set ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) set S = BitFTA0Str (ap,bp,cp,dp,cin); set C = BitFTA0Circ (ap,bp,cp,dp,cin); set A1 = GFA0AdderOutput (ap,bp,cp); set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2]; set cindp = [<*cin,dp*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) let a123, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a4 = s . dp & a5 = s . cin implies ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) ) assume that A1: a123 = s . (GFA0AdderOutput (ap,bp,cp)) and A2: a4 = s . dp and A3: a5 = s . cin ; ::_thesis: ( (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = a123 '&' a5 & (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) A4: dom s = the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by CIRCUIT1:3; A5: cin in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th4; A6: GFA0AdderOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th4; A7: InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by FACIRC_1:37; then [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; hence (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = and2 . (s * <*(GFA0AdderOutput (ap,bp,cp)),cin*>) by FACIRC_1:35 .= and2 . <*a123,a5*> by A1, A3, A6, A5, A4, FINSEQ_2:125 .= a123 '&' a5 by TWOSCOMP:def_1 ; ::_thesis: ( (Following s) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 ) A8: dp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th4; [<*cin,dp*>,and2] in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by A7, Th5; hence (Following s) . [<*cin,dp*>,and2] = and2 . (s * <*cin,dp*>) by FACIRC_1:35 .= and2 . <*a5,a4*> by A2, A3, A8, A5, A4, FINSEQ_2:125 .= a5 '&' a4 by TWOSCOMP:def_1 ; ::_thesis: (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' a123 [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by A7, Th5; hence (Following s) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = and2 . (s * <*dp,(GFA0AdderOutput (ap,bp,cp))*>) by FACIRC_1:35 .= and2 . <*a4,a123*> by A1, A2, A6, A8, A4, FINSEQ_2:125 .= a4 '&' a123 by TWOSCOMP:def_1 ; ::_thesis: verum end; Lm4: for ap, bp, cp, dp being non pair set for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a5 = s . cin holds (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = a123 'xor' a5 proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a5 = s . cin holds (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = a123 'xor' a5 let cin be set ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a5 = s . cin holds (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = a123 'xor' a5 set S = BitFTA0Str (ap,bp,cp,dp,cin); set C = BitFTA0Circ (ap,bp,cp,dp,cin); set A1 = GFA0AdderOutput (ap,bp,cp); set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]; let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a123, a5 being Element of BOOLEAN st a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a5 = s . cin holds (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = a123 'xor' a5 let a123, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a5 = s . cin implies (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = a123 'xor' a5 ) assume A1: ( a123 = s . (GFA0AdderOutput (ap,bp,cp)) & a5 = s . cin ) ; ::_thesis: (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = a123 'xor' a5 A2: dom s = the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by CIRCUIT1:3; A3: ( GFA0AdderOutput (ap,bp,cp) in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & cin in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) ) by Th4; InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by FACIRC_1:37; then [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; hence (Following s) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = xor2 . (s * <*(GFA0AdderOutput (ap,bp,cp)),cin*>) by FACIRC_1:35 .= xor2 . <*a123,a5*> by A1, A3, A2, FINSEQ_2:125 .= a123 'xor' a5 by TWOSCOMP:def_13 ; ::_thesis: verum end; Lm5: for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) implies for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) ) ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA0Str (ap,bp,cp,dp,cin); A2: ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; A3: ( cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A5: (Following (s,2)) . cin = a5 by A1, A4, Th8; set cindp = [<*cin,dp*>,and2]; set A1 = GFA0AdderOutput (ap,bp,cp); set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . dp = a4 ) by A1, A4, Th8; hence ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 & (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) ) by A6, A5, Lm3; ::_thesis: ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A7: ( (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 ) by A1, A4, Th8; A8: (Following (s,2)) . cin = a5 by A1, A4, Th8; A9: cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 ) by A1, A4, Th8; hence ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm6: for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) implies for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) ) ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA0Str (ap,bp,cp,dp,cin); A2: ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; A3: ( cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A5: ( (Following (s,2)) . cp = a3 & (Following (s,2)) . dp = a4 ) by A1, A4, Th8; set A1 = GFA0AdderOutput (ap,bp,cp); set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA0AdderOutput (ap,bp,cp)) = (a1 'xor' a2) 'xor' a3 & (Following (s,2)) . cin = a5 ) by A1, A4, Th8; hence (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 by A6, Lm4; ::_thesis: ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A7: (Following (s,2)) . cin = a5 by A1, A4, Th8; A8: cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bp = a2 ) by A1, A4, Th8; hence ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; Lm7: for ap, bp, cp, dp being non pair set for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] & a123y = s . [<*cin,dp*>,and2] & a123z = s . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] holds (Following s) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (a123x 'or' a123y) 'or' a123z proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] & a123y = s . [<*cin,dp*>,and2] & a123z = s . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] holds (Following s) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (a123x 'or' a123y) 'or' a123z let cin be set ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] & a123y = s . [<*cin,dp*>,and2] & a123z = s . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] holds (Following s) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (a123x 'or' a123y) 'or' a123z set S = BitFTA0Str (ap,bp,cp,dp,cin); set C = BitFTA0Circ (ap,bp,cp,dp,cin); set A1 = GFA0AdderOutput (ap,bp,cp); set A2 = GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2]; set cindp = [<*cin,dp*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] & a123y = s . [<*cin,dp*>,and2] & a123z = s . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] holds (Following s) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (a123x 'or' a123y) 'or' a123z let a123x, a123y, a123z be Element of BOOLEAN ; ::_thesis: ( a123x = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] & a123y = s . [<*cin,dp*>,and2] & a123z = s . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] implies (Following s) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (a123x 'or' a123y) 'or' a123z ) assume A1: ( a123x = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] & a123y = s . [<*cin,dp*>,and2] & a123z = s . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] ) ; ::_thesis: (Following s) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (a123x 'or' a123y) 'or' a123z A2: ( [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & [<*cin,dp*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) ) by Th4; A3: ( [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & dom s = the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) ) by Th4, CIRCUIT1:3; InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by FACIRC_1:37; then GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; hence (Following s) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = or3 . (s * <*[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2],[<*cin,dp*>,and2],[<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]*>) by FACIRC_1:35 .= or3 . <*a123x,a123y,a123z*> by A1, A2, A3, FINSEQ_2:126 .= (a123x 'or' a123y) 'or' a123z by TWOSCOMP:def_24 ; ::_thesis: verum end; Lm8: for ap, bp, cp, dp being non pair set for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] & a4 = s . dp holds (Following s) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = a1235 'xor' a4 proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] & a4 = s . dp holds (Following s) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = a1235 'xor' a4 let cin be set ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] & a4 = s . dp holds (Following s) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = a1235 'xor' a4 set S = BitFTA0Str (ap,bp,cp,dp,cin); set C = BitFTA0Circ (ap,bp,cp,dp,cin); set A1 = GFA0AdderOutput (ap,bp,cp); set A2 = GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]; let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] & a4 = s . dp holds (Following s) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = a1235 'xor' a4 let a1235, a4 be Element of BOOLEAN ; ::_thesis: ( a1235 = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] & a4 = s . dp implies (Following s) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = a1235 'xor' a4 ) assume A1: ( a1235 = s . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] & a4 = s . dp ) ; ::_thesis: (Following s) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = a1235 'xor' a4 A2: dom s = the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) by CIRCUIT1:3; A3: ( [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in the carrier of (BitFTA0Str (ap,bp,cp,dp,cin)) ) by Th4; InnerVertices (BitFTA0Str (ap,bp,cp,dp,cin)) = the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by FACIRC_1:37; then GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp) in the carrier' of (BitFTA0Str (ap,bp,cp,dp,cin)) by Th5; hence (Following s) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = xor2 . (s * <*[<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2],dp*>) by FACIRC_1:35 .= xor2 . <*a1235,a4*> by A1, A3, A2, FINSEQ_2:125 .= a1235 'xor' a4 by TWOSCOMP:def_13 ; ::_thesis: verum end; Lm9: for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) implies for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) ) ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA0Str (ap,bp,cp,dp,cin); A2: ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; A3: ( cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; set A1 = GFA0AdderOutput (ap,bp,cp); let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin implies ( (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A5: (Following (s,3)) . [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] = a4 '&' ((a1 'xor' a2) 'xor' a3) by A1, A4, Lm5; set cindp = [<*cin,dp*>,and2]; set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2]; set A2 = GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,and2] = ((a1 'xor' a2) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dp*>,and2] = a5 '&' a4 ) by A1, A4, Lm5; hence (Following (s,4)) . (GFA0CarryOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) by A6, A5, Lm7; ::_thesis: ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A7: ( (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 ) by A1, A4, Lm5; A8: (Following (s,3)) . cin = a5 by A1, A4, Lm5; A9: cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 ) by A1, A4, Lm5; hence ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm10: for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) proof let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) implies for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) ) ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA0Str (ap,bp,cp,dp,cin); A2: ( ap in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & bp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; A3: ( cp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) & dp in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) ) by A1, Th6; let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin implies ( (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A5: ( (Following (s,3)) . cp = a3 & (Following (s,3)) . dp = a4 ) by A1, A4, Lm6; set A1 = GFA0AdderOutput (ap,bp,cp); set A2 = GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set A1cin = [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2]; A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA0AdderOutput (ap,bp,cp)),cin*>,xor2] = ((a1 'xor' a2) 'xor' a3) 'xor' a5 & (Following (s,3)) . dp = a4 ) by A1, A4, Lm6; hence (Following (s,4)) . (GFA0AdderOutput ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) = (((a1 'xor' a2) 'xor' a3) 'xor' a5) 'xor' a4 by A6, Lm8 .= (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 by XBOOLEAN:73 ; ::_thesis: ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A7: (Following (s,3)) . cin = a5 by A1, A4, Lm6; A8: cin in InputVertices (BitFTA0Str (ap,bp,cp,dp,cin)) by A1, Th6; ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bp = a2 ) by A1, A4, Lm6; hence ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; theorem :: FTACELL1:9 for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] & not cin in InnerVertices (BitGFA0Str (ap,bp,cp)) holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bp & a3 = s . cp & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (BitFTA0AdderOutputP (ap,bp,cp,dp,cin)) = ((((a1 'xor' a2) 'xor' a3) '&' a5) 'or' (a5 '&' a4)) 'or' (a4 '&' ((a1 'xor' a2) 'xor' a3)) & (Following (s,4)) . (BitFTA0AdderOutputQ (ap,bp,cp,dp,cin)) = (((a1 'xor' a2) 'xor' a3) 'xor' a4) 'xor' a5 ) by Lm9, Lm10; theorem :: FTACELL1:10 for ap, bp, cp, dp being non pair set for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) holds Following (s,4) is stable proof set n1 = 2; set n2 = 2; let ap, bp, cp, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] holds for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) holds Following (s,4) is stable let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] implies for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) holds Following (s,4) is stable ) set C = BitFTA0Circ (ap,bp,cp,dp,cin); set S1 = BitGFA0Str (ap,bp,cp); set C1 = BitGFA0Circ (ap,bp,cp); set A1 = GFA0AdderOutput (ap,bp,cp); set S2 = BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set C2 = BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp); set cindp = [<*cin,dp*>,and2]; set dpA1 = [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2]; assume A1: cin <> [<*dp,(GFA0AdderOutput (ap,bp,cp))*>,and2] ; ::_thesis: for s being State of (BitFTA0Circ (ap,bp,cp,dp,cin)) holds Following (s,4) is stable let s be State of (BitFTA0Circ (ap,bp,cp,dp,cin)); ::_thesis: Following (s,4) is stable BitGFA0Circ (ap,bp,cp) tolerates BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp) by CIRCCOMB:60; then A2: the Sorts of (BitGFA0Circ (ap,bp,cp)) tolerates the Sorts of (BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) by CIRCCOMB:def_3; then reconsider s1 = s | the carrier of (BitGFA0Str (ap,bp,cp)) as State of (BitGFA0Circ (ap,bp,cp)) by CIRCCOMB:26; reconsider s2 = (Following (s,2)) | the carrier of (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) as State of (BitGFA0Circ ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) by A2, CIRCCOMB:26; A3: ( InputVertices (BitGFA0Str (ap,bp,cp)) misses InnerVertices (BitGFA0Str ((GFA0AdderOutput (ap,bp,cp)),cin,dp)) & Following (s1,2) is stable ) by Lm2, GFACIRC1:40; GFA0AdderOutput (ap,bp,cp) <> [<*cin,dp*>,and2] by Lm1; then Following (s2,2) is stable by A1, GFACIRC1:40; then Following (s,(2 + 2)) is stable by A3, CIRCCMB2:19, CIRCCOMB:60; hence Following (s,4) is stable ; ::_thesis: verum end; begin definition let ap, bm, cp, dm, cin be set ; func BitFTA1Str (ap,bm,cp,dm,cin) -> non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign equals :: FTACELL1:def 7 (BitGFA1Str (ap,bm,cp)) +* (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)); coherence (BitGFA1Str (ap,bm,cp)) +* (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) is non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign ; end; :: deftheorem defines BitFTA1Str FTACELL1:def_7_:_ for ap, bm, cp, dm, cin being set holds BitFTA1Str (ap,bm,cp,dm,cin) = (BitGFA1Str (ap,bm,cp)) +* (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)); definition let ap, bm, cp, dm, cin be set ; func BitFTA1Circ (ap,bm,cp,dm,cin) -> strict gate`2=den Boolean Circuit of BitFTA1Str (ap,bm,cp,dm,cin) equals :: FTACELL1:def 8 (BitGFA1Circ (ap,bm,cp)) +* (BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm)); coherence (BitGFA1Circ (ap,bm,cp)) +* (BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) is strict gate`2=den Boolean Circuit of BitFTA1Str (ap,bm,cp,dm,cin) ; end; :: deftheorem defines BitFTA1Circ FTACELL1:def_8_:_ for ap, bm, cp, dm, cin being set holds BitFTA1Circ (ap,bm,cp,dm,cin) = (BitGFA1Circ (ap,bm,cp)) +* (BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm)); theorem Th11: :: FTACELL1:11 for ap, bm, cp, dm, cin being set holds InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = (({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} proof let ap, bm, cp, dm, cin be set ; ::_thesis: InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = (({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} set S = BitFTA1Str (ap,bm,cp,dm,cin); set S1 = BitGFA1Str (ap,bm,cp); set A1 = GFA1AdderOutput (ap,bm,cp); set C1 = GFA1CarryOutput (ap,bm,cp); set S2 = BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set A2 = GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set C2 = GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set apbm0 = [<*ap,bm*>,xor2c]; set apbm = [<*ap,bm*>,and2c]; set bmcp = [<*bm,cp*>,and2a]; set cpap = [<*cp,ap*>,and2]; set A1cin0 = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]; set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a]; set cindm = [<*cin,dm*>,and2c]; set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; BitGFA1Str (ap,bm,cp) tolerates BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm) by CIRCCOMB:47; hence InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = (InnerVertices (BitGFA1Str (ap,bm,cp))) \/ (InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) by CIRCCOMB:11 .= ((({[<*ap,bm*>,xor2c]} \/ {(GFA1AdderOutput (ap,bm,cp))}) \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2]}) \/ {(GFA1CarryOutput (ap,bm,cp))}) \/ (InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) by GFACIRC1:63 .= (({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2]}) \/ {(GFA1CarryOutput (ap,bm,cp))}) \/ (InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) by ENUMSET1:1 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ ({[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2]} \/ {(GFA1CarryOutput (ap,bm,cp))})) \/ (InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) by XBOOLE_1:4 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ (InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) by ENUMSET1:6 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ ((({[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]} \/ {(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]}) \/ {(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) by GFACIRC1:95 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ (({[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]}) \/ {(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) by ENUMSET1:1 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ ({[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} \/ ({[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]} \/ {(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))})) by XBOOLE_1:4 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ ({[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) by ENUMSET1:6 .= (({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} by XBOOLE_1:4 ; ::_thesis: verum end; theorem :: FTACELL1:12 for ap, bm, cp, dm, cin being set holds InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) is Relation proof let ap, bm, cp, dm, cin be set ; ::_thesis: InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) is Relation set S1 = BitGFA1Str (ap,bm,cp); set A1 = GFA1AdderOutput (ap,bm,cp); set S2 = BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm); ( InnerVertices (BitGFA1Str (ap,bm,cp)) is Relation & InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) is Relation ) by GFACIRC1:64, GFACIRC1:96; hence InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) is Relation by FACIRC_1:3; ::_thesis: verum end; Lm11: for x, y, z, p being set holds GFA1AdderOutput (x,y,z) <> [p,and2c] proof let x, y, z be set ; ::_thesis: for p being set holds GFA1AdderOutput (x,y,z) <> [p,and2c] let p be set ; ::_thesis: GFA1AdderOutput (x,y,z) <> [p,and2c] set A1 = GFA1AdderOutput (x,y,z); now__::_thesis:_not_[p,and2c]_`2_=_(GFA1AdderOutput_(x,y,z))_`2 assume [p,and2c] `2 = (GFA1AdderOutput (x,y,z)) `2 ; ::_thesis: contradiction then A1: [p,and2c] `2 = xor2c by MCART_1:7; thus contradiction by A1, GFACIRC1:3, GFACIRC1:4; ::_thesis: verum end; hence GFA1AdderOutput (x,y,z) <> [p,and2c] ; ::_thesis: verum end; Lm12: for ap, bm, cp being non pair set for x, y, z being set holds InputVertices (BitGFA1Str (ap,bm,cp)) misses InnerVertices (BitGFA2Str (x,y,z)) proof let ap, bm, cp be non pair set ; ::_thesis: for x, y, z being set holds InputVertices (BitGFA1Str (ap,bm,cp)) misses InnerVertices (BitGFA2Str (x,y,z)) let x, y, z be set ; ::_thesis: InputVertices (BitGFA1Str (ap,bm,cp)) misses InnerVertices (BitGFA2Str (x,y,z)) set S1 = BitGFA1Str (ap,bm,cp); InputVertices (BitGFA1Str (ap,bm,cp)) is without_pairs by GFACIRC1:67; hence InputVertices (BitGFA1Str (ap,bm,cp)) misses InnerVertices (BitGFA2Str (x,y,z)) by FACIRC_1:5, GFACIRC1:96; ::_thesis: verum end; theorem Th13: :: FTACELL1:13 for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = {ap,bm,cp,dm,cin} proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = {ap,bm,cp,dm,cin} let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) implies InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = {ap,bm,cp,dm,cin} ) set S = BitFTA1Str (ap,bm,cp,dm,cin); set S1 = BitGFA1Str (ap,bm,cp); set A1 = GFA1AdderOutput (ap,bm,cp); set C1 = GFA1CarryOutput (ap,bm,cp); set S2 = BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set apbm0 = [<*ap,bm*>,xor2c]; set apbm = [<*ap,bm*>,and2c]; set bmcp = [<*bm,cp*>,and2a]; set cpap = [<*cp,ap*>,and2]; set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; assume that A1: cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] and A2: not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) ; ::_thesis: InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = {ap,bm,cp,dm,cin} A3: not dm in {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} by ENUMSET1:def_4; GFA1AdderOutput (ap,bm,cp) in {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} by ENUMSET1:def_4; then A4: {(GFA1AdderOutput (ap,bm,cp))} \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} = {} by ZFMISC_1:60; A5: InnerVertices (BitGFA1Str (ap,bm,cp)) = (({[<*ap,bm*>,xor2c]} \/ {(GFA1AdderOutput (ap,bm,cp))}) \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2]}) \/ {(GFA1CarryOutput (ap,bm,cp))} by GFACIRC1:63 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2]}) \/ {(GFA1CarryOutput (ap,bm,cp))} by ENUMSET1:1 .= {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ ({[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2]} \/ {(GFA1CarryOutput (ap,bm,cp))}) by XBOOLE_1:4 .= {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c]} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} by ENUMSET1:6 .= {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} by ENUMSET1:12 ; then A6: {(GFA1AdderOutput (ap,bm,cp)),cin,dm} \ (InnerVertices (BitGFA1Str (ap,bm,cp))) = ({(GFA1AdderOutput (ap,bm,cp))} \/ {cin,dm}) \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} by ENUMSET1:2 .= ({(GFA1AdderOutput (ap,bm,cp))} \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ ({cin,dm} \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) by XBOOLE_1:42 .= ({cin} \/ {dm}) \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} by A4, ENUMSET1:1 .= ({cin} \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ ({dm} \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) by XBOOLE_1:42 .= {cin} \/ ({dm} \ {(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,xor2c],[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) by A2, A5, ZFMISC_1:59 .= {cin} \/ {dm} by A3, ZFMISC_1:59 .= {cin,dm} by ENUMSET1:1 ; ( InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) misses InputVertices (BitGFA1Str (ap,bm,cp)) & BitGFA1Str (ap,bm,cp) tolerates BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm) ) by Lm12, CIRCCOMB:47; hence InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = (InputVertices (BitGFA1Str (ap,bm,cp))) \/ ((InputVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) \ (InnerVertices (BitGFA1Str (ap,bm,cp)))) by FACIRC_1:4 .= {ap,bm,cp} \/ ((InputVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) \ (InnerVertices (BitGFA1Str (ap,bm,cp)))) by GFACIRC1:66 .= {ap,bm,cp} \/ ({(GFA1AdderOutput (ap,bm,cp)),cin,dm} \ (InnerVertices (BitGFA1Str (ap,bm,cp)))) by A1, Lm11, GFACIRC1:97 .= {ap,bm,cp,dm,cin} by A6, ENUMSET1:9 ; ::_thesis: verum end; theorem Th14: :: FTACELL1:14 for ap, bm, cp, dm, cin being set holds ( ap in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,xor2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1AdderOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,and2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*bm,cp*>,and2a] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cp,ap*>,and2] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1CarryOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cin,dm*>,and2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) ) proof let ap, bm, cp, dm, cin be set ; ::_thesis: ( ap in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,xor2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1AdderOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,and2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*bm,cp*>,and2a] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cp,ap*>,and2] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1CarryOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cin,dm*>,and2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) ) set S1 = BitGFA1Str (ap,bm,cp); set A1 = GFA1AdderOutput (ap,bm,cp); set C1 = GFA1CarryOutput (ap,bm,cp); set S2 = BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set A2 = GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set C2 = GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set apbm0 = [<*ap,bm*>,xor2c]; set apbm = [<*ap,bm*>,and2c]; set bmcp = [<*bm,cp*>,and2a]; set cpap = [<*cp,ap*>,and2]; set A1cin0 = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]; set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a]; set cindm = [<*cin,dm*>,and2c]; set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; A1: ( cp in the carrier of (BitGFA1Str (ap,bm,cp)) & [<*ap,bm*>,xor2c] in the carrier of (BitGFA1Str (ap,bm,cp)) ) by GFACIRC1:68; A2: ( [<*ap,bm*>,and2c] in the carrier of (BitGFA1Str (ap,bm,cp)) & [<*bm,cp*>,and2a] in the carrier of (BitGFA1Str (ap,bm,cp)) ) by GFACIRC1:68; A3: ( GFA1AdderOutput (ap,bm,cp) in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) & cin in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) ) by GFACIRC1:100; A4: ( [<*cp,ap*>,and2] in the carrier of (BitGFA1Str (ap,bm,cp)) & GFA1CarryOutput (ap,bm,cp) in the carrier of (BitGFA1Str (ap,bm,cp)) ) by GFACIRC1:68; A5: GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) by GFACIRC1:100; A6: ( [<*cin,dm*>,and2c] in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) & [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) ) by GFACIRC1:100; A7: ( GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) ) by GFACIRC1:100; A8: ( dm in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) ) by GFACIRC1:100; ( ap in the carrier of (BitGFA1Str (ap,bm,cp)) & bm in the carrier of (BitGFA1Str (ap,bm,cp)) ) by GFACIRC1:68; hence ( ap in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,xor2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1AdderOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,and2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*bm,cp*>,and2a] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cp,ap*>,and2] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1CarryOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cin,dm*>,and2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, A2, A4, A3, A8, A7, A6, A5, FACIRC_1:20; ::_thesis: verum end; theorem Th15: :: FTACELL1:15 for ap, bm, cp, dm, cin being set holds ( [<*ap,bm*>,xor2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1AdderOutput (ap,bm,cp) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,and2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*bm,cp*>,and2a] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cp,ap*>,and2] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1CarryOutput (ap,bm,cp) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cin,dm*>,and2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) proof let ap, bm, cp, dm, cin be set ; ::_thesis: ( [<*ap,bm*>,xor2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1AdderOutput (ap,bm,cp) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,and2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*bm,cp*>,and2a] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cp,ap*>,and2] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1CarryOutput (ap,bm,cp) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cin,dm*>,and2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) set S = BitFTA1Str (ap,bm,cp,dm,cin); set A1 = GFA1AdderOutput (ap,bm,cp); set C1 = GFA1CarryOutput (ap,bm,cp); set A2 = GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set C2 = GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set apbm0 = [<*ap,bm*>,xor2c]; set apbm = [<*ap,bm*>,and2c]; set bmcp = [<*bm,cp*>,and2a]; set cpap = [<*cp,ap*>,and2]; set A1cin0 = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]; set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a]; set cindm = [<*cin,dm*>,and2c]; set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; set p1 = {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}; set p2 = {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}; A1: ( [<*ap,bm*>,xor2c] in {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} & GFA1AdderOutput (ap,bm,cp) in {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} ) by ENUMSET1:def_4; A2: ( [<*ap,bm*>,and2c] in {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} & [<*bm,cp*>,and2a] in {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} ) by ENUMSET1:def_4; A3: ( [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} & GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} ) by ENUMSET1:def_4; A4: ( [<*cp,ap*>,and2] in {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} & GFA1CarryOutput (ap,bm,cp) in {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} ) by ENUMSET1:def_4; A5: ( [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} & GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} ) by ENUMSET1:def_4; A6: ( [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} & [<*cin,dm*>,and2c] in {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} ) by ENUMSET1:def_4; InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = (({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp))} \/ {[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} by Th11 .= ({[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} by ENUMSET1:12 .= {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} \/ ({[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))}) by XBOOLE_1:4 .= {[<*ap,bm*>,xor2c],(GFA1AdderOutput (ap,bm,cp)),[<*ap,bm*>,and2c],[<*bm,cp*>,and2a],[<*cp,ap*>,and2],(GFA1CarryOutput (ap,bm,cp))} \/ {[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],(GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)),[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b],(GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm))} by ENUMSET1:12 ; hence ( [<*ap,bm*>,xor2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1AdderOutput (ap,bm,cp) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*ap,bm*>,and2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*bm,cp*>,and2a] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cp,ap*>,and2] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA1CarryOutput (ap,bm,cp) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cin,dm*>,and2c] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, A2, A4, A3, A6, A5, XBOOLE_0:def_3; ::_thesis: verum end; theorem Th16: :: FTACELL1:16 for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) implies ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) ) set S = BitFTA1Str (ap,bm,cp,dm,cin); set S1 = BitGFA1Str (ap,bm,cp); set A1 = GFA1AdderOutput (ap,bm,cp); set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; assume ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) ) ; ::_thesis: ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) then InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = {ap,bm,cp,dm,cin} by Th13; hence ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by ENUMSET1:def_3; ::_thesis: verum end; definition let ap, bm, cp, dm, cin be set ; func BitFTA1CarryOutput (ap,bm,cp,dm,cin) -> Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) equals :: FTACELL1:def 9 GFA1CarryOutput (ap,bm,cp); coherence GFA1CarryOutput (ap,bm,cp) is Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; func BitFTA1AdderOutputI (ap,bm,cp,dm,cin) -> Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) equals :: FTACELL1:def 10 GFA1AdderOutput (ap,bm,cp); coherence GFA1AdderOutput (ap,bm,cp) is Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; func BitFTA1AdderOutputP (ap,bm,cp,dm,cin) -> Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) equals :: FTACELL1:def 11 GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); coherence GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) is Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; func BitFTA1AdderOutputQ (ap,bm,cp,dm,cin) -> Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) equals :: FTACELL1:def 12 GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); coherence GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) is Element of InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; end; :: deftheorem defines BitFTA1CarryOutput FTACELL1:def_9_:_ for ap, bm, cp, dm, cin being set holds BitFTA1CarryOutput (ap,bm,cp,dm,cin) = GFA1CarryOutput (ap,bm,cp); :: deftheorem defines BitFTA1AdderOutputI FTACELL1:def_10_:_ for ap, bm, cp, dm, cin being set holds BitFTA1AdderOutputI (ap,bm,cp,dm,cin) = GFA1AdderOutput (ap,bm,cp); :: deftheorem defines BitFTA1AdderOutputP FTACELL1:def_11_:_ for ap, bm, cp, dm, cin being set holds BitFTA1AdderOutputP (ap,bm,cp,dm,cin) = GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); :: deftheorem defines BitFTA1AdderOutputQ FTACELL1:def_12_:_ for ap, bm, cp, dm, cin being set holds BitFTA1AdderOutputQ (ap,bm,cp,dm,cin) = GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); theorem :: FTACELL1:17 for ap, bm, cp being non pair set for dm, cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp holds ( (Following (s,2)) . (BitFTA1CarryOutput (ap,bm,cp,dm,cin)) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) ) proof let ap, bm, cp be non pair set ; ::_thesis: for dm, cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp holds ( (Following (s,2)) . (BitFTA1CarryOutput (ap,bm,cp,dm,cin)) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) ) let dm, cin be set ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp holds ( (Following (s,2)) . (BitFTA1CarryOutput (ap,bm,cp,dm,cin)) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) ) let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a1, a2, a3 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp holds ( (Following (s,2)) . (BitFTA1CarryOutput (ap,bm,cp,dm,cin)) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) ) set S1 = BitGFA1Str (ap,bm,cp); set C1 = BitGFA1Circ (ap,bm,cp); set A1 = GFA1AdderOutput (ap,bm,cp); set A2 = GFA1CarryOutput (ap,bm,cp); set S2 = BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set C2 = BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm); let a1, a2, a3 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp implies ( (Following (s,2)) . (BitFTA1CarryOutput (ap,bm,cp,dm,cin)) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) ) ) assume that A1: a1 = s . ap and A2: a2 = s . bm and A3: a3 = s . cp ; ::_thesis: ( (Following (s,2)) . (BitFTA1CarryOutput (ap,bm,cp,dm,cin)) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) & (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) ) reconsider s1 = s | the carrier of (BitGFA1Str (ap,bm,cp)) as State of (BitGFA1Circ (ap,bm,cp)) by FACIRC_1:26; A4: dom s1 = the carrier of (BitGFA1Str (ap,bm,cp)) by CIRCUIT1:3; ap in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then A5: a1 = s1 . ap by A1, A4, FUNCT_1:47; reconsider t = s as State of ((BitGFA1Circ (ap,bm,cp)) +* (BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) ; A6: InputVertices (BitGFA1Str (ap,bm,cp)) misses InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) by Lm12; cp in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then A7: a3 = s1 . cp by A3, A4, FUNCT_1:47; bm in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then A8: a2 = s1 . bm by A2, A4, FUNCT_1:47; GFA1CarryOutput (ap,bm,cp) in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then (Following (t,2)) . (GFA1CarryOutput (ap,bm,cp)) = (Following (s1,2)) . (GFA1CarryOutput (ap,bm,cp)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA1CarryOutput (ap,bm,cp,dm,cin)) = ((a1 '&' ('not' a2)) 'or' (('not' a2) '&' a3)) 'or' (a3 '&' a1) by A5, A8, A7, GFACIRC1:71; ::_thesis: (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) GFA1AdderOutput (ap,bm,cp) in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then (Following (t,2)) . (GFA1AdderOutput (ap,bm,cp)) = (Following (s1,2)) . (GFA1AdderOutput (ap,bm,cp)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA1AdderOutputI (ap,bm,cp,dm,cin)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) by A5, A8, A7, GFACIRC1:71; ::_thesis: verum end; theorem Th18: :: FTACELL1:18 for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) implies for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) ) ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) set A1 = GFA1AdderOutput (ap,bm,cp); set C1 = BitGFA1Circ (ap,bm,cp); set S1 = BitGFA1Str (ap,bm,cp); set S2 = BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set C2 = BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set S = BitFTA1Str (ap,bm,cp,dm,cin); let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin implies ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) ) assume that A2: a1 = s . ap and A3: a2 = s . bm and A4: a3 = s . cp and A5: a4 = s . dm and A6: a5 = s . cin ; ::_thesis: ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) reconsider s1 = s | the carrier of (BitGFA1Str (ap,bm,cp)) as State of (BitGFA1Circ (ap,bm,cp)) by FACIRC_1:26; A7: dom s1 = the carrier of (BitGFA1Str (ap,bm,cp)) by CIRCUIT1:3; A8: dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; then A9: (Following s) . dm = a4 by A5, CIRCUIT2:def_5; A10: cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; then A11: (Following s) . cp = a3 by A4, CIRCUIT2:def_5; bm in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then A12: a2 = s1 . bm by A3, A7, FUNCT_1:47; reconsider t = s as State of ((BitGFA1Circ (ap,bm,cp)) +* (BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm))) ; ( GFA1AdderOutput (ap,bm,cp) in the carrier of (BitGFA1Str (ap,bm,cp)) & InputVertices (BitGFA1Str (ap,bm,cp)) misses InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) ) by Lm12, GFACIRC1:68; then A13: (Following (t,2)) . (GFA1AdderOutput (ap,bm,cp)) = (Following (s1,2)) . (GFA1AdderOutput (ap,bm,cp)) by FACIRC_1:32; cp in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then A14: a3 = s1 . cp by A4, A7, FUNCT_1:47; ap in the carrier of (BitGFA1Str (ap,bm,cp)) by GFACIRC1:68; then a1 = s1 . ap by A2, A7, FUNCT_1:47; hence (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) by A12, A14, A13, GFACIRC1:71; ::_thesis: ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) A15: bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; then A16: (Following s) . bm = a2 by A3, CIRCUIT2:def_5; A17: cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; then A18: (Following s) . cin = a5 by A6, CIRCUIT2:def_5; A19: ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; then ( Following (s,2) = Following (Following s) & (Following s) . ap = a1 ) by A2, CIRCUIT2:def_5, FACIRC_1:15; hence ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) by A19, A15, A10, A8, A17, A16, A11, A9, A18, CIRCUIT2:def_5; ::_thesis: verum end; Lm13: for ap, bm, cp, dm being non pair set for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ('not' a123) '&' a5 & (Following s) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) ) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ('not' a123) '&' a5 & (Following s) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) ) let cin be set ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ('not' a123) '&' a5 & (Following s) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) ) set S = BitFTA1Str (ap,bm,cp,dm,cin); set C = BitFTA1Circ (ap,bm,cp,dm,cin); set A1 = GFA1AdderOutput (ap,bm,cp); set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a]; set cindm = [<*cin,dm*>,and2c]; set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ('not' a123) '&' a5 & (Following s) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) ) let a123, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a4 = s . dm & a5 = s . cin implies ( (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ('not' a123) '&' a5 & (Following s) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) ) ) assume that A1: a123 = s . (GFA1AdderOutput (ap,bm,cp)) and A2: a4 = s . dm and A3: a5 = s . cin ; ::_thesis: ( (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ('not' a123) '&' a5 & (Following s) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) ) A4: dom s = the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) by CIRCUIT1:3; A5: cin in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) by Th14; A6: GFA1AdderOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) by Th14; A7: InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by FACIRC_1:37; then [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; hence (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = and2a . (s * <*(GFA1AdderOutput (ap,bm,cp)),cin*>) by FACIRC_1:35 .= and2a . <*a123,a5*> by A1, A3, A6, A5, A4, FINSEQ_2:125 .= ('not' a123) '&' a5 by TWOSCOMP:def_2 ; ::_thesis: ( (Following s) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) ) A8: dm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) by Th14; [<*cin,dm*>,and2c] in the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by A7, Th15; hence (Following s) . [<*cin,dm*>,and2c] = and2c . (s * <*cin,dm*>) by FACIRC_1:35 .= and2c . <*a5,a4*> by A2, A3, A8, A5, A4, FINSEQ_2:125 .= a5 '&' ('not' a4) by GFACIRC1:def_3 ; ::_thesis: (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ('not' a123) [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by A7, Th15; hence (Following s) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = and2b . (s * <*dm,(GFA1AdderOutput (ap,bm,cp))*>) by FACIRC_1:35 .= and2b . <*a4,a123*> by A1, A2, A6, A8, A4, FINSEQ_2:125 .= ('not' a4) '&' ('not' a123) by TWOSCOMP:def_3 ; ::_thesis: verum end; Lm14: for ap, bm, cp, dm being non pair set for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a5 = s . cin holds (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = a123 'xor' ('not' a5) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a5 = s . cin holds (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = a123 'xor' ('not' a5) let cin be set ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a5 = s . cin holds (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = a123 'xor' ('not' a5) set S = BitFTA1Str (ap,bm,cp,dm,cin); set C = BitFTA1Circ (ap,bm,cp,dm,cin); set A1 = GFA1AdderOutput (ap,bm,cp); set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]; let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a123, a5 being Element of BOOLEAN st a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a5 = s . cin holds (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = a123 'xor' ('not' a5) let a123, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a5 = s . cin implies (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = a123 'xor' ('not' a5) ) assume A1: ( a123 = s . (GFA1AdderOutput (ap,bm,cp)) & a5 = s . cin ) ; ::_thesis: (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = a123 'xor' ('not' a5) A2: dom s = the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) by CIRCUIT1:3; A3: ( GFA1AdderOutput (ap,bm,cp) in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & cin in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) ) by Th14; InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by FACIRC_1:37; then [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; hence (Following s) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = xor2c . (s * <*(GFA1AdderOutput (ap,bm,cp)),cin*>) by FACIRC_1:35 .= xor2c . <*a123,a5*> by A1, A3, A2, FINSEQ_2:125 .= a123 'xor' ('not' a5) by GFACIRC1:def_4 ; ::_thesis: verum end; Lm15: for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) implies for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) ) ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA1Str (ap,bm,cp,dm,cin); A2: ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; A3: ( cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A5: (Following (s,2)) . cin = a5 by A1, A4, Th18; set cindm = [<*cin,dm*>,and2c]; set A1 = GFA1AdderOutput (ap,bm,cp); set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a]; set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . dm = a4 ) by A1, A4, Th18; hence ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) ) by A6, A5, Lm13; ::_thesis: ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A7: ( (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 ) by A1, A4, Th18; A8: (Following (s,2)) . cin = a5 by A1, A4, Th18; A9: cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 ) by A1, A4, Th18; hence ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm16: for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) implies for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) ) ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA1Str (ap,bm,cp,dm,cin); A2: ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; A3: ( cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A5: ( (Following (s,2)) . cp = a3 & (Following (s,2)) . dm = a4 ) by A1, A4, Th18; set A1 = GFA1AdderOutput (ap,bm,cp); set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA1AdderOutput (ap,bm,cp)) = 'not' ((a1 'xor' ('not' a2)) 'xor' a3) & (Following (s,2)) . cin = a5 ) by A1, A4, Th18; hence (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) by A6, Lm14; ::_thesis: ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A7: (Following (s,2)) . cin = a5 by A1, A4, Th18; A8: cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; ( (Following (s,2)) . ap = a1 & (Following (s,2)) . bm = a2 ) by A1, A4, Th18; hence ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; Lm17: for ap, bm, cp, dm being non pair set for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] & a123y = s . [<*cin,dm*>,and2c] & a123z = s . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] holds (Following s) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] & a123y = s . [<*cin,dm*>,and2c] & a123z = s . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] holds (Following s) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) let cin be set ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] & a123y = s . [<*cin,dm*>,and2c] & a123z = s . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] holds (Following s) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) set S = BitFTA1Str (ap,bm,cp,dm,cin); set C = BitFTA1Circ (ap,bm,cp,dm,cin); set A1 = GFA1AdderOutput (ap,bm,cp); set A2 = GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a]; set cindm = [<*cin,dm*>,and2c]; set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] & a123y = s . [<*cin,dm*>,and2c] & a123z = s . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] holds (Following s) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) let a123x, a123y, a123z be Element of BOOLEAN ; ::_thesis: ( a123x = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] & a123y = s . [<*cin,dm*>,and2c] & a123z = s . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] implies (Following s) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) ) assume A1: ( a123x = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] & a123y = s . [<*cin,dm*>,and2c] & a123z = s . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] ) ; ::_thesis: (Following s) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) A2: ( [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & [<*cin,dm*>,and2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) ) by Th14; A3: ( [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & dom s = the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) ) by Th14, CIRCUIT1:3; InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by FACIRC_1:37; then GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; hence (Following s) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = nor3 . (s * <*[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a],[<*cin,dm*>,and2c],[<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]*>) by FACIRC_1:35 .= nor3 . <*a123x,a123y,a123z*> by A1, A2, A3, FINSEQ_2:126 .= 'not' ((a123x 'or' a123y) 'or' a123z) by TWOSCOMP:def_28 ; ::_thesis: verum end; Lm18: for ap, bm, cp, dm being non pair set for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] & a4 = s . dm holds (Following s) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = a1235 'xor' ('not' a4) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] & a4 = s . dm holds (Following s) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = a1235 'xor' ('not' a4) let cin be set ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] & a4 = s . dm holds (Following s) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = a1235 'xor' ('not' a4) set S = BitFTA1Str (ap,bm,cp,dm,cin); set C = BitFTA1Circ (ap,bm,cp,dm,cin); set A1 = GFA1AdderOutput (ap,bm,cp); set A2 = GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]; let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] & a4 = s . dm holds (Following s) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = a1235 'xor' ('not' a4) let a1235, a4 be Element of BOOLEAN ; ::_thesis: ( a1235 = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] & a4 = s . dm implies (Following s) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = a1235 'xor' ('not' a4) ) assume A1: ( a1235 = s . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] & a4 = s . dm ) ; ::_thesis: (Following s) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = a1235 'xor' ('not' a4) A2: dom s = the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) by CIRCUIT1:3; A3: ( [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in the carrier of (BitFTA1Str (ap,bm,cp,dm,cin)) ) by Th14; InnerVertices (BitFTA1Str (ap,bm,cp,dm,cin)) = the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by FACIRC_1:37; then GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm) in the carrier' of (BitFTA1Str (ap,bm,cp,dm,cin)) by Th15; hence (Following s) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = xor2c . (s * <*[<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c],dm*>) by FACIRC_1:35 .= xor2c . <*a1235,a4*> by A1, A3, A2, FINSEQ_2:125 .= a1235 'xor' ('not' a4) by GFACIRC1:def_4 ; ::_thesis: verum end; Lm19: for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) implies for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) ) ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA1Str (ap,bm,cp,dm,cin); A2: ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; A3: ( cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; set A1 = GFA1AdderOutput (ap,bm,cp); let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin implies ( (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A5: (Following (s,3)) . [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] = ('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3) by A1, A4, Lm15; set cindm = [<*cin,dm*>,and2c]; set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a]; set A2 = GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,and2a] = ((a1 'xor' ('not' a2)) 'xor' a3) '&' a5 & (Following (s,3)) . [<*cin,dm*>,and2c] = a5 '&' ('not' a4) ) by A1, A4, Lm15; hence (Following (s,4)) . (GFA2CarryOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) by A6, A5, Lm17; ::_thesis: ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A7: ( (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 ) by A1, A4, Lm15; A8: (Following (s,3)) . cin = a5 by A1, A4, Lm15; A9: cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 ) by A1, A4, Lm15; hence ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm20: for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) proof let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) implies for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) ) ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA1Str (ap,bm,cp,dm,cin); A2: ( ap in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & bm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; A3: ( cp in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) & dm in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) ) by A1, Th16; let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin implies ( (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 & (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A5: ( (Following (s,3)) . cp = a3 & (Following (s,3)) . dm = a4 ) by A1, A4, Lm16; set A1 = GFA1AdderOutput (ap,bm,cp); set A2 = GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set A1cin = [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c]; A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA1AdderOutput (ap,bm,cp)),cin*>,xor2c] = ('not' ((a1 'xor' ('not' a2)) 'xor' a3)) 'xor' ('not' a5) & (Following (s,3)) . dm = a4 ) by A1, A4, Lm16; hence (Following (s,4)) . (GFA2AdderOutput ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' a5) 'xor' ('not' a4) by A6, Lm18 .= (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 by XBOOLEAN:73 ; ::_thesis: ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A7: (Following (s,3)) . cin = a5 by A1, A4, Lm16; A8: cin in InputVertices (BitFTA1Str (ap,bm,cp,dm,cin)) by A1, Th16; ( (Following (s,3)) . ap = a1 & (Following (s,3)) . bm = a2 ) by A1, A4, Lm16; hence ( (Following (s,4)) . ap = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cp = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; theorem :: FTACELL1:19 for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] & not cin in InnerVertices (BitGFA1Str (ap,bm,cp)) holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . ap & a2 = s . bm & a3 = s . cp & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (BitFTA1AdderOutputP (ap,bm,cp,dm,cin)) = 'not' (((((a1 'xor' ('not' a2)) 'xor' a3) '&' a5) 'or' (a5 '&' ('not' a4))) 'or' (('not' a4) '&' ((a1 'xor' ('not' a2)) 'xor' a3))) & (Following (s,4)) . (BitFTA1AdderOutputQ (ap,bm,cp,dm,cin)) = (((a1 'xor' ('not' a2)) 'xor' a3) 'xor' ('not' a4)) 'xor' a5 ) by Lm19, Lm20; theorem :: FTACELL1:20 for ap, bm, cp, dm being non pair set for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) holds Following (s,4) is stable proof set n1 = 2; set n2 = 2; let ap, bm, cp, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] holds for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) holds Following (s,4) is stable let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] implies for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) holds Following (s,4) is stable ) set C = BitFTA1Circ (ap,bm,cp,dm,cin); set S1 = BitGFA1Str (ap,bm,cp); set C1 = BitGFA1Circ (ap,bm,cp); set A1 = GFA1AdderOutput (ap,bm,cp); set S2 = BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set C2 = BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm); set dmA1 = [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b]; assume A1: cin <> [<*dm,(GFA1AdderOutput (ap,bm,cp))*>,and2b] ; ::_thesis: for s being State of (BitFTA1Circ (ap,bm,cp,dm,cin)) holds Following (s,4) is stable let s be State of (BitFTA1Circ (ap,bm,cp,dm,cin)); ::_thesis: Following (s,4) is stable BitGFA1Circ (ap,bm,cp) tolerates BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm) by CIRCCOMB:60; then A2: the Sorts of (BitGFA1Circ (ap,bm,cp)) tolerates the Sorts of (BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) by CIRCCOMB:def_3; then reconsider s1 = s | the carrier of (BitGFA1Str (ap,bm,cp)) as State of (BitGFA1Circ (ap,bm,cp)) by CIRCCOMB:26; reconsider s2 = (Following (s,2)) | the carrier of (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) as State of (BitGFA2Circ ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) by A2, CIRCCOMB:26; A3: ( InputVertices (BitGFA1Str (ap,bm,cp)) misses InnerVertices (BitGFA2Str ((GFA1AdderOutput (ap,bm,cp)),cin,dm)) & Following (s1,2) is stable ) by Lm12, GFACIRC1:72; Following (s2,2) is stable by A1, Lm11, GFACIRC1:104; then Following (s,(2 + 2)) is stable by A3, CIRCCMB2:19, CIRCCOMB:60; hence Following (s,4) is stable ; ::_thesis: verum end; begin definition let am, bp, cm, dp, cin be set ; func BitFTA2Str (am,bp,cm,dp,cin) -> non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign equals :: FTACELL1:def 13 (BitGFA2Str (am,bp,cm)) +* (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)); coherence (BitGFA2Str (am,bp,cm)) +* (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) is non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign ; end; :: deftheorem defines BitFTA2Str FTACELL1:def_13_:_ for am, bp, cm, dp, cin being set holds BitFTA2Str (am,bp,cm,dp,cin) = (BitGFA2Str (am,bp,cm)) +* (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)); definition let am, bp, cm, dp, cin be set ; func BitFTA2Circ (am,bp,cm,dp,cin) -> strict gate`2=den Boolean Circuit of BitFTA2Str (am,bp,cm,dp,cin) equals :: FTACELL1:def 14 (BitGFA2Circ (am,bp,cm)) +* (BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp)); coherence (BitGFA2Circ (am,bp,cm)) +* (BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp)) is strict gate`2=den Boolean Circuit of BitFTA2Str (am,bp,cm,dp,cin) ; end; :: deftheorem defines BitFTA2Circ FTACELL1:def_14_:_ for am, bp, cm, dp, cin being set holds BitFTA2Circ (am,bp,cm,dp,cin) = (BitGFA2Circ (am,bp,cm)) +* (BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp)); theorem Th21: :: FTACELL1:21 for am, bp, cm, dp, cin being set holds InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = (({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} proof let am, bp, cm, dp, cin be set ; ::_thesis: InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = (({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} set S = BitFTA2Str (am,bp,cm,dp,cin); set S1 = BitGFA2Str (am,bp,cm); set A1 = GFA2AdderOutput (am,bp,cm); set C1 = GFA2CarryOutput (am,bp,cm); set S2 = BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp); set A2 = GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set C2 = GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set ambp0 = [<*am,bp*>,xor2c]; set ambp = [<*am,bp*>,and2a]; set bpcm = [<*bp,cm*>,and2c]; set cmam = [<*cm,am*>,and2b]; set A1cin0 = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]; set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c]; set cindp = [<*cin,dp*>,and2a]; set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; BitGFA2Str (am,bp,cm) tolerates BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp) by CIRCCOMB:47; hence InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = (InnerVertices (BitGFA2Str (am,bp,cm))) \/ (InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp))) by CIRCCOMB:11 .= ((({[<*am,bp*>,xor2c]} \/ {(GFA2AdderOutput (am,bp,cm))}) \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b]}) \/ {(GFA2CarryOutput (am,bp,cm))}) \/ (InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp))) by GFACIRC1:95 .= (({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b]}) \/ {(GFA2CarryOutput (am,bp,cm))}) \/ (InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp))) by ENUMSET1:1 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ ({[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b]} \/ {(GFA2CarryOutput (am,bp,cm))})) \/ (InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp))) by XBOOLE_1:4 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ (InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp))) by ENUMSET1:6 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ ((({[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]} \/ {(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]}) \/ {(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) by GFACIRC1:63 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ (({[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]}) \/ {(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) by ENUMSET1:1 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ ({[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} \/ ({[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]} \/ {(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))})) by XBOOLE_1:4 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ ({[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) by ENUMSET1:6 .= (({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} by XBOOLE_1:4 ; ::_thesis: verum end; theorem :: FTACELL1:22 for am, bp, cm, dp, cin being set holds InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) is Relation proof let am, bp, cm, dp, cin be set ; ::_thesis: InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) is Relation set S1 = BitGFA2Str (am,bp,cm); set A1 = GFA2AdderOutput (am,bp,cm); set S2 = BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp); ( InnerVertices (BitGFA2Str (am,bp,cm)) is Relation & InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) is Relation ) by GFACIRC1:64, GFACIRC1:96; hence InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) is Relation by FACIRC_1:3; ::_thesis: verum end; Lm21: for x, y, z, p being set holds GFA2AdderOutput (x,y,z) <> [p,and2a] proof let x, y, z be set ; ::_thesis: for p being set holds GFA2AdderOutput (x,y,z) <> [p,and2a] let p be set ; ::_thesis: GFA2AdderOutput (x,y,z) <> [p,and2a] set A1 = GFA2AdderOutput (x,y,z); now__::_thesis:_not_[p,and2a]_`2_=_(GFA2AdderOutput_(x,y,z))_`2 assume [p,and2a] `2 = (GFA2AdderOutput (x,y,z)) `2 ; ::_thesis: contradiction then A1: [p,and2a] `2 = xor2c by MCART_1:7; thus contradiction by A1, GFACIRC1:4, TWOSCOMP:9; ::_thesis: verum end; hence GFA2AdderOutput (x,y,z) <> [p,and2a] ; ::_thesis: verum end; Lm22: for am, bp, cm being non pair set for x, y, z being set holds InputVertices (BitGFA2Str (am,bp,cm)) misses InnerVertices (BitGFA1Str (x,y,z)) proof let am, bp, cm be non pair set ; ::_thesis: for x, y, z being set holds InputVertices (BitGFA2Str (am,bp,cm)) misses InnerVertices (BitGFA1Str (x,y,z)) let x, y, z be set ; ::_thesis: InputVertices (BitGFA2Str (am,bp,cm)) misses InnerVertices (BitGFA1Str (x,y,z)) set S1 = BitGFA2Str (am,bp,cm); InputVertices (BitGFA2Str (am,bp,cm)) is without_pairs by GFACIRC1:99; hence InputVertices (BitGFA2Str (am,bp,cm)) misses InnerVertices (BitGFA1Str (x,y,z)) by FACIRC_1:5, GFACIRC1:64; ::_thesis: verum end; theorem Th23: :: FTACELL1:23 for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) = {am,bp,cm,dp,cin} proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) = {am,bp,cm,dp,cin} let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) implies InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) = {am,bp,cm,dp,cin} ) set S = BitFTA2Str (am,bp,cm,dp,cin); set S1 = BitGFA2Str (am,bp,cm); set A1 = GFA2AdderOutput (am,bp,cm); set C1 = GFA2CarryOutput (am,bp,cm); set S2 = BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp); set ambp0 = [<*am,bp*>,xor2c]; set ambp = [<*am,bp*>,and2a]; set bpcm = [<*bp,cm*>,and2c]; set cmam = [<*cm,am*>,and2b]; set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; assume that A1: cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] and A2: not cin in InnerVertices (BitGFA2Str (am,bp,cm)) ; ::_thesis: InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) = {am,bp,cm,dp,cin} A3: not dp in {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} by ENUMSET1:def_4; GFA2AdderOutput (am,bp,cm) in {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} by ENUMSET1:def_4; then A4: {(GFA2AdderOutput (am,bp,cm))} \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} = {} by ZFMISC_1:60; A5: InnerVertices (BitGFA2Str (am,bp,cm)) = (({[<*am,bp*>,xor2c]} \/ {(GFA2AdderOutput (am,bp,cm))}) \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b]}) \/ {(GFA2CarryOutput (am,bp,cm))} by GFACIRC1:95 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b]}) \/ {(GFA2CarryOutput (am,bp,cm))} by ENUMSET1:1 .= {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ ({[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b]} \/ {(GFA2CarryOutput (am,bp,cm))}) by XBOOLE_1:4 .= {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c]} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} by ENUMSET1:6 .= {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} by ENUMSET1:12 ; then A6: {(GFA2AdderOutput (am,bp,cm)),cin,dp} \ (InnerVertices (BitGFA2Str (am,bp,cm))) = ({(GFA2AdderOutput (am,bp,cm))} \/ {cin,dp}) \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} by ENUMSET1:2 .= ({(GFA2AdderOutput (am,bp,cm))} \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ ({cin,dp} \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) by XBOOLE_1:42 .= ({cin} \/ {dp}) \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} by A4, ENUMSET1:1 .= ({cin} \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ ({dp} \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) by XBOOLE_1:42 .= {cin} \/ ({dp} \ {(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,xor2c],[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) by A2, A5, ZFMISC_1:59 .= {cin} \/ {dp} by A3, ZFMISC_1:59 .= {cin,dp} by ENUMSET1:1 ; ( InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) misses InputVertices (BitGFA2Str (am,bp,cm)) & BitGFA2Str (am,bp,cm) tolerates BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp) ) by Lm22, CIRCCOMB:47; hence InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) = (InputVertices (BitGFA2Str (am,bp,cm))) \/ ((InputVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp))) \ (InnerVertices (BitGFA2Str (am,bp,cm)))) by FACIRC_1:4 .= {am,bp,cm} \/ ((InputVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp))) \ (InnerVertices (BitGFA2Str (am,bp,cm)))) by GFACIRC1:98 .= {am,bp,cm} \/ ({(GFA2AdderOutput (am,bp,cm)),cin,dp} \ (InnerVertices (BitGFA2Str (am,bp,cm)))) by A1, Lm21, GFACIRC1:65 .= {am,bp,cm,dp,cin} by A6, ENUMSET1:9 ; ::_thesis: verum end; theorem Th24: :: FTACELL1:24 for am, bp, cm, dp, cin being set holds ( am in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & bp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & cm in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & dp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & cin in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,xor2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2AdderOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,and2a] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*bp,cm*>,and2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cm,am*>,and2b] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2CarryOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cin,dp*>,and2a] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) ) proof let am, bp, cm, dp, cin be set ; ::_thesis: ( am in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & bp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & cm in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & dp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & cin in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,xor2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2AdderOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,and2a] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*bp,cm*>,and2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cm,am*>,and2b] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2CarryOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cin,dp*>,and2a] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) ) set S1 = BitGFA2Str (am,bp,cm); set A1 = GFA2AdderOutput (am,bp,cm); set C1 = GFA2CarryOutput (am,bp,cm); set S2 = BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp); set A2 = GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set C2 = GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set ambp0 = [<*am,bp*>,xor2c]; set ambp = [<*am,bp*>,and2a]; set bpcm = [<*bp,cm*>,and2c]; set cmam = [<*cm,am*>,and2b]; set A1cin0 = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]; set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c]; set cindp = [<*cin,dp*>,and2a]; set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; A1: ( cm in the carrier of (BitGFA2Str (am,bp,cm)) & [<*am,bp*>,xor2c] in the carrier of (BitGFA2Str (am,bp,cm)) ) by GFACIRC1:100; A2: ( [<*am,bp*>,and2a] in the carrier of (BitGFA2Str (am,bp,cm)) & [<*bp,cm*>,and2c] in the carrier of (BitGFA2Str (am,bp,cm)) ) by GFACIRC1:100; A3: ( GFA2AdderOutput (am,bp,cm) in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) & cin in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) ) by GFACIRC1:68; A4: ( [<*cm,am*>,and2b] in the carrier of (BitGFA2Str (am,bp,cm)) & GFA2CarryOutput (am,bp,cm) in the carrier of (BitGFA2Str (am,bp,cm)) ) by GFACIRC1:100; A5: GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) by GFACIRC1:68; A6: ( [<*cin,dp*>,and2a] in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) & [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) ) by GFACIRC1:68; A7: ( GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) ) by GFACIRC1:68; A8: ( dp in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) ) by GFACIRC1:68; ( am in the carrier of (BitGFA2Str (am,bp,cm)) & bp in the carrier of (BitGFA2Str (am,bp,cm)) ) by GFACIRC1:100; hence ( am in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & bp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & cm in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & dp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & cin in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,xor2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2AdderOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,and2a] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*bp,cm*>,and2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cm,am*>,and2b] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2CarryOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cin,dp*>,and2a] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, A2, A4, A3, A8, A7, A6, A5, FACIRC_1:20; ::_thesis: verum end; theorem Th25: :: FTACELL1:25 for am, bp, cm, dp, cin being set holds ( [<*am,bp*>,xor2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2AdderOutput (am,bp,cm) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,and2a] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*bp,cm*>,and2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cm,am*>,and2b] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2CarryOutput (am,bp,cm) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cin,dp*>,and2a] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) proof let am, bp, cm, dp, cin be set ; ::_thesis: ( [<*am,bp*>,xor2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2AdderOutput (am,bp,cm) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,and2a] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*bp,cm*>,and2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cm,am*>,and2b] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2CarryOutput (am,bp,cm) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cin,dp*>,and2a] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) set S = BitFTA2Str (am,bp,cm,dp,cin); set A1 = GFA2AdderOutput (am,bp,cm); set C1 = GFA2CarryOutput (am,bp,cm); set A2 = GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set C2 = GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set ambp0 = [<*am,bp*>,xor2c]; set ambp = [<*am,bp*>,and2a]; set bpcm = [<*bp,cm*>,and2c]; set cmam = [<*cm,am*>,and2b]; set A1cin0 = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]; set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c]; set cindp = [<*cin,dp*>,and2a]; set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; set p1 = {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}; set p2 = {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}; A1: ( [<*am,bp*>,xor2c] in {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} & GFA2AdderOutput (am,bp,cm) in {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} ) by ENUMSET1:def_4; A2: ( [<*am,bp*>,and2a] in {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} & [<*bp,cm*>,and2c] in {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} ) by ENUMSET1:def_4; A3: ( [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} & GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} ) by ENUMSET1:def_4; A4: ( [<*cm,am*>,and2b] in {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} & GFA2CarryOutput (am,bp,cm) in {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} ) by ENUMSET1:def_4; A5: ( [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} & GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} ) by ENUMSET1:def_4; A6: ( [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} & [<*cin,dp*>,and2a] in {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} ) by ENUMSET1:def_4; InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = (({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm))} \/ {[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} by Th21 .= ({[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} by ENUMSET1:12 .= {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} \/ ({[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))}) by XBOOLE_1:4 .= {[<*am,bp*>,xor2c],(GFA2AdderOutput (am,bp,cm)),[<*am,bp*>,and2a],[<*bp,cm*>,and2c],[<*cm,am*>,and2b],(GFA2CarryOutput (am,bp,cm))} \/ {[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],(GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)),[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2],(GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp))} by ENUMSET1:12 ; hence ( [<*am,bp*>,xor2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2AdderOutput (am,bp,cm) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*am,bp*>,and2a] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*bp,cm*>,and2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cm,am*>,and2b] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA2CarryOutput (am,bp,cm) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cin,dp*>,and2a] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) & GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, A2, A4, A3, A6, A5, XBOOLE_0:def_3; ::_thesis: verum end; theorem Th26: :: FTACELL1:26 for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) implies ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) ) set S = BitFTA2Str (am,bp,cm,dp,cin); set S1 = BitGFA2Str (am,bp,cm); set A1 = GFA2AdderOutput (am,bp,cm); set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; assume ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) ) ; ::_thesis: ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) then InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) = {am,bp,cm,dp,cin} by Th23; hence ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by ENUMSET1:def_3; ::_thesis: verum end; definition let am, bp, cm, dp, cin be set ; func BitFTA2CarryOutput (am,bp,cm,dp,cin) -> Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) equals :: FTACELL1:def 15 GFA2CarryOutput (am,bp,cm); coherence GFA2CarryOutput (am,bp,cm) is Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; func BitFTA2AdderOutputI (am,bp,cm,dp,cin) -> Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) equals :: FTACELL1:def 16 GFA2AdderOutput (am,bp,cm); coherence GFA2AdderOutput (am,bp,cm) is Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; func BitFTA2AdderOutputP (am,bp,cm,dp,cin) -> Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) equals :: FTACELL1:def 17 GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); coherence GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) is Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; func BitFTA2AdderOutputQ (am,bp,cm,dp,cin) -> Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) equals :: FTACELL1:def 18 GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); coherence GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) is Element of InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; end; :: deftheorem defines BitFTA2CarryOutput FTACELL1:def_15_:_ for am, bp, cm, dp, cin being set holds BitFTA2CarryOutput (am,bp,cm,dp,cin) = GFA2CarryOutput (am,bp,cm); :: deftheorem defines BitFTA2AdderOutputI FTACELL1:def_16_:_ for am, bp, cm, dp, cin being set holds BitFTA2AdderOutputI (am,bp,cm,dp,cin) = GFA2AdderOutput (am,bp,cm); :: deftheorem defines BitFTA2AdderOutputP FTACELL1:def_17_:_ for am, bp, cm, dp, cin being set holds BitFTA2AdderOutputP (am,bp,cm,dp,cin) = GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); :: deftheorem defines BitFTA2AdderOutputQ FTACELL1:def_18_:_ for am, bp, cm, dp, cin being set holds BitFTA2AdderOutputQ (am,bp,cm,dp,cin) = GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); theorem :: FTACELL1:27 for am, bp, cm being non pair set for dp, cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm holds ( (Following (s,2)) . (BitFTA2CarryOutput (am,bp,cm,dp,cin)) = 'not' (((('not' a1) '&' a2) 'or' (a2 '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) ) proof let am, bp, cm be non pair set ; ::_thesis: for dp, cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm holds ( (Following (s,2)) . (BitFTA2CarryOutput (am,bp,cm,dp,cin)) = 'not' (((('not' a1) '&' a2) 'or' (a2 '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) ) let dp, cin be set ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm holds ( (Following (s,2)) . (BitFTA2CarryOutput (am,bp,cm,dp,cin)) = 'not' (((('not' a1) '&' a2) 'or' (a2 '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) ) let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm holds ( (Following (s,2)) . (BitFTA2CarryOutput (am,bp,cm,dp,cin)) = 'not' (((('not' a1) '&' a2) 'or' (a2 '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) ) set S1 = BitGFA2Str (am,bp,cm); set C1 = BitGFA2Circ (am,bp,cm); set A1 = GFA2AdderOutput (am,bp,cm); set A2 = GFA2CarryOutput (am,bp,cm); set S2 = BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp); set C2 = BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp); let a1, a2, a3 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bp & a3 = s . cm implies ( (Following (s,2)) . (BitFTA2CarryOutput (am,bp,cm,dp,cin)) = 'not' (((('not' a1) '&' a2) 'or' (a2 '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) ) ) assume that A1: a1 = s . am and A2: a2 = s . bp and A3: a3 = s . cm ; ::_thesis: ( (Following (s,2)) . (BitFTA2CarryOutput (am,bp,cm,dp,cin)) = 'not' (((('not' a1) '&' a2) 'or' (a2 '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) ) reconsider s1 = s | the carrier of (BitGFA2Str (am,bp,cm)) as State of (BitGFA2Circ (am,bp,cm)) by FACIRC_1:26; A4: dom s1 = the carrier of (BitGFA2Str (am,bp,cm)) by CIRCUIT1:3; am in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then A5: a1 = s1 . am by A1, A4, FUNCT_1:47; reconsider t = s as State of ((BitGFA2Circ (am,bp,cm)) +* (BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp))) ; A6: InputVertices (BitGFA2Str (am,bp,cm)) misses InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) by Lm22; cm in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then A7: a3 = s1 . cm by A3, A4, FUNCT_1:47; bp in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then A8: a2 = s1 . bp by A2, A4, FUNCT_1:47; GFA2CarryOutput (am,bp,cm) in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then (Following (t,2)) . (GFA2CarryOutput (am,bp,cm)) = (Following (s1,2)) . (GFA2CarryOutput (am,bp,cm)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA2CarryOutput (am,bp,cm,dp,cin)) = 'not' (((('not' a1) '&' a2) 'or' (a2 '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) by A5, A8, A7, GFACIRC1:103; ::_thesis: (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) GFA2AdderOutput (am,bp,cm) in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then (Following (t,2)) . (GFA2AdderOutput (am,bp,cm)) = (Following (s1,2)) . (GFA2AdderOutput (am,bp,cm)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA2AdderOutputI (am,bp,cm,dp,cin)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) by A5, A8, A7, GFACIRC1:103; ::_thesis: verum end; theorem Th28: :: FTACELL1:28 for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) implies for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) ) ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) set A1 = GFA2AdderOutput (am,bp,cm); set C1 = BitGFA2Circ (am,bp,cm); set S1 = BitGFA2Str (am,bp,cm); set S2 = BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp); set C2 = BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp); set S = BitFTA2Str (am,bp,cm,dp,cin); let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin implies ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) ) assume that A2: a1 = s . am and A3: a2 = s . bp and A4: a3 = s . cm and A5: a4 = s . dp and A6: a5 = s . cin ; ::_thesis: ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) reconsider s1 = s | the carrier of (BitGFA2Str (am,bp,cm)) as State of (BitGFA2Circ (am,bp,cm)) by FACIRC_1:26; A7: dom s1 = the carrier of (BitGFA2Str (am,bp,cm)) by CIRCUIT1:3; A8: dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; then A9: (Following s) . dp = a4 by A5, CIRCUIT2:def_5; A10: cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; then A11: (Following s) . cm = a3 by A4, CIRCUIT2:def_5; bp in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then A12: a2 = s1 . bp by A3, A7, FUNCT_1:47; reconsider t = s as State of ((BitGFA2Circ (am,bp,cm)) +* (BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp))) ; ( GFA2AdderOutput (am,bp,cm) in the carrier of (BitGFA2Str (am,bp,cm)) & InputVertices (BitGFA2Str (am,bp,cm)) misses InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) ) by Lm22, GFACIRC1:100; then A13: (Following (t,2)) . (GFA2AdderOutput (am,bp,cm)) = (Following (s1,2)) . (GFA2AdderOutput (am,bp,cm)) by FACIRC_1:32; cm in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then A14: a3 = s1 . cm by A4, A7, FUNCT_1:47; am in the carrier of (BitGFA2Str (am,bp,cm)) by GFACIRC1:100; then a1 = s1 . am by A2, A7, FUNCT_1:47; hence (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) by A12, A14, A13, GFACIRC1:103; ::_thesis: ( (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) A15: bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; then A16: (Following s) . bp = a2 by A3, CIRCUIT2:def_5; A17: cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; then A18: (Following s) . cin = a5 by A6, CIRCUIT2:def_5; A19: am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; then ( Following (s,2) = Following (Following s) & (Following s) . am = a1 ) by A2, CIRCUIT2:def_5, FACIRC_1:15; hence ( (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 & (Following (s,2)) . cin = a5 ) by A19, A15, A10, A8, A17, A16, A11, A9, A18, CIRCUIT2:def_5; ::_thesis: verum end; Lm23: for am, bp, cm, dp being non pair set for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = a123 '&' ('not' a5) & (Following s) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 ) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = a123 '&' ('not' a5) & (Following s) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 ) let cin be set ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = a123 '&' ('not' a5) & (Following s) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 ) set S = BitFTA2Str (am,bp,cm,dp,cin); set C = BitFTA2Circ (am,bp,cm,dp,cin); set A1 = GFA2AdderOutput (am,bp,cm); set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c]; set cindp = [<*cin,dp*>,and2a]; set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a4 = s . dp & a5 = s . cin holds ( (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = a123 '&' ('not' a5) & (Following s) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 ) let a123, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA2AdderOutput (am,bp,cm)) & a4 = s . dp & a5 = s . cin implies ( (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = a123 '&' ('not' a5) & (Following s) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 ) ) assume that A1: a123 = s . (GFA2AdderOutput (am,bp,cm)) and A2: a4 = s . dp and A3: a5 = s . cin ; ::_thesis: ( (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = a123 '&' ('not' a5) & (Following s) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 ) A4: dom s = the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) by CIRCUIT1:3; A5: cin in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) by Th24; A6: GFA2AdderOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) by Th24; A7: InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by FACIRC_1:37; then [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; hence (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = and2c . (s * <*(GFA2AdderOutput (am,bp,cm)),cin*>) by FACIRC_1:35 .= and2c . <*a123,a5*> by A1, A3, A6, A5, A4, FINSEQ_2:125 .= a123 '&' ('not' a5) by GFACIRC1:def_3 ; ::_thesis: ( (Following s) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 ) A8: dp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) by Th24; [<*cin,dp*>,and2a] in the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by A7, Th25; hence (Following s) . [<*cin,dp*>,and2a] = and2a . (s * <*cin,dp*>) by FACIRC_1:35 .= and2a . <*a5,a4*> by A2, A3, A8, A5, A4, FINSEQ_2:125 .= ('not' a5) '&' a4 by TWOSCOMP:def_2 ; ::_thesis: (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' a123 [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by A7, Th25; hence (Following s) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = and2 . (s * <*dp,(GFA2AdderOutput (am,bp,cm))*>) by FACIRC_1:35 .= and2 . <*a4,a123*> by A1, A2, A6, A8, A4, FINSEQ_2:125 .= a4 '&' a123 by TWOSCOMP:def_1 ; ::_thesis: verum end; Lm24: for am, bp, cm, dp being non pair set for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a5 = s . cin holds (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = a123 'xor' ('not' a5) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a5 = s . cin holds (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = a123 'xor' ('not' a5) let cin be set ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a5 = s . cin holds (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = a123 'xor' ('not' a5) set S = BitFTA2Str (am,bp,cm,dp,cin); set C = BitFTA2Circ (am,bp,cm,dp,cin); set A1 = GFA2AdderOutput (am,bp,cm); set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]; let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a123, a5 being Element of BOOLEAN st a123 = s . (GFA2AdderOutput (am,bp,cm)) & a5 = s . cin holds (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = a123 'xor' ('not' a5) let a123, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA2AdderOutput (am,bp,cm)) & a5 = s . cin implies (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = a123 'xor' ('not' a5) ) assume A1: ( a123 = s . (GFA2AdderOutput (am,bp,cm)) & a5 = s . cin ) ; ::_thesis: (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = a123 'xor' ('not' a5) A2: dom s = the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) by CIRCUIT1:3; A3: ( GFA2AdderOutput (am,bp,cm) in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & cin in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) ) by Th24; InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by FACIRC_1:37; then [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; hence (Following s) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = xor2c . (s * <*(GFA2AdderOutput (am,bp,cm)),cin*>) by FACIRC_1:35 .= xor2c . <*a123,a5*> by A1, A3, A2, FINSEQ_2:125 .= a123 'xor' ('not' a5) by GFACIRC1:def_4 ; ::_thesis: verum end; Lm25: for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) implies for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) ) ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA2Str (am,bp,cm,dp,cin); A2: ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; A3: ( cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A5: (Following (s,2)) . cin = a5 by A1, A4, Th28; set cindp = [<*cin,dp*>,and2a]; set A1 = GFA2AdderOutput (am,bp,cm); set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c]; set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . dp = a4 ) by A1, A4, Th28; hence ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 & (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) ) by A6, A5, Lm23; ::_thesis: ( (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A7: ( (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 ) by A1, A4, Th28; A8: (Following (s,2)) . cin = a5 by A1, A4, Th28; A9: cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; ( (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 ) by A1, A4, Th28; hence ( (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm26: for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) implies for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) ) ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA2Str (am,bp,cm,dp,cin); A2: ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; A3: ( cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A5: ( (Following (s,2)) . cm = a3 & (Following (s,2)) . dp = a4 ) by A1, A4, Th28; set A1 = GFA2AdderOutput (am,bp,cm); set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA2AdderOutput (am,bp,cm)) = (('not' a1) 'xor' a2) 'xor' ('not' a3) & (Following (s,2)) . cin = a5 ) by A1, A4, Th28; hence (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) by A6, Lm24; ::_thesis: ( (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) A7: (Following (s,2)) . cin = a5 by A1, A4, Th28; A8: cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; ( (Following (s,2)) . am = a1 & (Following (s,2)) . bp = a2 ) by A1, A4, Th28; hence ( (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; Lm27: for am, bp, cm, dp being non pair set for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] & a123y = s . [<*cin,dp*>,and2a] & a123z = s . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] holds (Following s) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = (a123x 'or' a123y) 'or' a123z proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] & a123y = s . [<*cin,dp*>,and2a] & a123z = s . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] holds (Following s) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = (a123x 'or' a123y) 'or' a123z let cin be set ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] & a123y = s . [<*cin,dp*>,and2a] & a123z = s . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] holds (Following s) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = (a123x 'or' a123y) 'or' a123z set S = BitFTA2Str (am,bp,cm,dp,cin); set C = BitFTA2Circ (am,bp,cm,dp,cin); set A1 = GFA2AdderOutput (am,bp,cm); set A2 = GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c]; set cindp = [<*cin,dp*>,and2a]; set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] & a123y = s . [<*cin,dp*>,and2a] & a123z = s . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] holds (Following s) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = (a123x 'or' a123y) 'or' a123z let a123x, a123y, a123z be Element of BOOLEAN ; ::_thesis: ( a123x = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] & a123y = s . [<*cin,dp*>,and2a] & a123z = s . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] implies (Following s) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = (a123x 'or' a123y) 'or' a123z ) assume A1: ( a123x = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] & a123y = s . [<*cin,dp*>,and2a] & a123z = s . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] ) ; ::_thesis: (Following s) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = (a123x 'or' a123y) 'or' a123z A2: ( [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & [<*cin,dp*>,and2a] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) ) by Th24; A3: ( [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & dom s = the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) ) by Th24, CIRCUIT1:3; InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by FACIRC_1:37; then GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; hence (Following s) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = or3 . (s * <*[<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c],[<*cin,dp*>,and2a],[<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]*>) by FACIRC_1:35 .= or3 . <*a123x,a123y,a123z*> by A1, A2, A3, FINSEQ_2:126 .= (a123x 'or' a123y) 'or' a123z by TWOSCOMP:def_24 ; ::_thesis: verum end; Lm28: for am, bp, cm, dp being non pair set for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] & a4 = s . dp holds (Following s) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = a1235 'xor' ('not' a4) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] & a4 = s . dp holds (Following s) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = a1235 'xor' ('not' a4) let cin be set ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] & a4 = s . dp holds (Following s) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = a1235 'xor' ('not' a4) set S = BitFTA2Str (am,bp,cm,dp,cin); set C = BitFTA2Circ (am,bp,cm,dp,cin); set A1 = GFA2AdderOutput (am,bp,cm); set A2 = GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]; let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] & a4 = s . dp holds (Following s) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = a1235 'xor' ('not' a4) let a1235, a4 be Element of BOOLEAN ; ::_thesis: ( a1235 = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] & a4 = s . dp implies (Following s) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = a1235 'xor' ('not' a4) ) assume A1: ( a1235 = s . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] & a4 = s . dp ) ; ::_thesis: (Following s) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = a1235 'xor' ('not' a4) A2: dom s = the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) by CIRCUIT1:3; A3: ( [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) & dp in the carrier of (BitFTA2Str (am,bp,cm,dp,cin)) ) by Th24; InnerVertices (BitFTA2Str (am,bp,cm,dp,cin)) = the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by FACIRC_1:37; then GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp) in the carrier' of (BitFTA2Str (am,bp,cm,dp,cin)) by Th25; hence (Following s) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = xor2c . (s * <*[<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c],dp*>) by FACIRC_1:35 .= xor2c . <*a1235,a4*> by A1, A3, A2, FINSEQ_2:125 .= a1235 'xor' ('not' a4) by GFACIRC1:def_4 ; ::_thesis: verum end; Lm29: for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) implies for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) ) ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA2Str (am,bp,cm,dp,cin); A2: ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; A3: ( cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; set A1 = GFA2AdderOutput (am,bp,cm); let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin implies ( (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A5: (Following (s,3)) . [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] = a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3)) by A1, A4, Lm25; set cindp = [<*cin,dp*>,and2a]; set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c]; set A2 = GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,and2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dp*>,and2a] = ('not' a5) '&' a4 ) by A1, A4, Lm25; hence (Following (s,4)) . (GFA1CarryOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) by A6, A5, Lm27; ::_thesis: ( (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A7: ( (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 ) by A1, A4, Lm25; A8: (Following (s,3)) . cin = a5 by A1, A4, Lm25; A9: cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; ( (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 ) by A1, A4, Lm25; hence ( (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm30: for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) proof let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) implies for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) ) ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA2Str (am,bp,cm,dp,cin); A2: ( am in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & bp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; A3: ( cm in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) & dp in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) ) by A1, Th26; let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin implies ( (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A5: ( (Following (s,3)) . cm = a3 & (Following (s,3)) . dp = a4 ) by A1, A4, Lm26; set A1 = GFA2AdderOutput (am,bp,cm); set A2 = GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp); set A1cin = [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c]; A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA2AdderOutput (am,bp,cm)),cin*>,xor2c] = ((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5) & (Following (s,3)) . dp = a4 ) by A1, A4, Lm26; hence (Following (s,4)) . (GFA1AdderOutput ((GFA2AdderOutput (am,bp,cm)),cin,dp)) = (((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5)) 'xor' ('not' a4) by A6, Lm28 .= 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' ('not' a5)) 'xor' a4) by XBOOLEAN:74 .= 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) by XBOOLEAN:73 ; ::_thesis: ( (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) A7: (Following (s,3)) . cin = a5 by A1, A4, Lm26; A8: cin in InputVertices (BitFTA2Str (am,bp,cm,dp,cin)) by A1, Th26; ( (Following (s,3)) . am = a1 & (Following (s,3)) . bp = a2 ) by A1, A4, Lm26; hence ( (Following (s,4)) . am = a1 & (Following (s,4)) . bp = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dp = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; theorem :: FTACELL1:29 for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] & not cin in InnerVertices (BitGFA2Str (am,bp,cm)) holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bp & a3 = s . cm & a4 = s . dp & a5 = s . cin holds ( (Following (s,4)) . (BitFTA2AdderOutputP (am,bp,cm,dp,cin)) = ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' a4)) 'or' (a4 '&' ((('not' a1) 'xor' a2) 'xor' ('not' a3))) & (Following (s,4)) . (BitFTA2AdderOutputQ (am,bp,cm,dp,cin)) = 'not' ((((('not' a1) 'xor' a2) 'xor' ('not' a3)) 'xor' a4) 'xor' ('not' a5)) ) by Lm29, Lm30; theorem :: FTACELL1:30 for am, bp, cm, dp being non pair set for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) holds Following (s,4) is stable proof set n1 = 2; set n2 = 2; let am, bp, cm, dp be non pair set ; ::_thesis: for cin being set st cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] holds for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) holds Following (s,4) is stable let cin be set ; ::_thesis: ( cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] implies for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) holds Following (s,4) is stable ) set C = BitFTA2Circ (am,bp,cm,dp,cin); set S1 = BitGFA2Str (am,bp,cm); set C1 = BitGFA2Circ (am,bp,cm); set A1 = GFA2AdderOutput (am,bp,cm); set S2 = BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp); set C2 = BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp); set dpA1 = [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2]; assume A1: cin <> [<*dp,(GFA2AdderOutput (am,bp,cm))*>,and2] ; ::_thesis: for s being State of (BitFTA2Circ (am,bp,cm,dp,cin)) holds Following (s,4) is stable let s be State of (BitFTA2Circ (am,bp,cm,dp,cin)); ::_thesis: Following (s,4) is stable BitGFA2Circ (am,bp,cm) tolerates BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp) by CIRCCOMB:60; then A2: the Sorts of (BitGFA2Circ (am,bp,cm)) tolerates the Sorts of (BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp)) by CIRCCOMB:def_3; then reconsider s1 = s | the carrier of (BitGFA2Str (am,bp,cm)) as State of (BitGFA2Circ (am,bp,cm)) by CIRCCOMB:26; reconsider s2 = (Following (s,2)) | the carrier of (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) as State of (BitGFA1Circ ((GFA2AdderOutput (am,bp,cm)),cin,dp)) by A2, CIRCCOMB:26; A3: ( InputVertices (BitGFA2Str (am,bp,cm)) misses InnerVertices (BitGFA1Str ((GFA2AdderOutput (am,bp,cm)),cin,dp)) & Following (s1,2) is stable ) by Lm22, GFACIRC1:104; Following (s2,2) is stable by A1, Lm21, GFACIRC1:72; then Following (s,(2 + 2)) is stable by A3, CIRCCMB2:19, CIRCCOMB:60; hence Following (s,4) is stable ; ::_thesis: verum end; begin definition let am, bm, cm, dm, cin be set ; func BitFTA3Str (am,bm,cm,dm,cin) -> non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign equals :: FTACELL1:def 19 (BitGFA3Str (am,bm,cm)) +* (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)); coherence (BitGFA3Str (am,bm,cm)) +* (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) is non empty non void strict unsplit gate`1=arity gate`2isBoolean ManySortedSign ; end; :: deftheorem defines BitFTA3Str FTACELL1:def_19_:_ for am, bm, cm, dm, cin being set holds BitFTA3Str (am,bm,cm,dm,cin) = (BitGFA3Str (am,bm,cm)) +* (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)); definition let am, bm, cm, dm, cin be set ; func BitFTA3Circ (am,bm,cm,dm,cin) -> strict gate`2=den Boolean Circuit of BitFTA3Str (am,bm,cm,dm,cin) equals :: FTACELL1:def 20 (BitGFA3Circ (am,bm,cm)) +* (BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm)); coherence (BitGFA3Circ (am,bm,cm)) +* (BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm)) is strict gate`2=den Boolean Circuit of BitFTA3Str (am,bm,cm,dm,cin) ; end; :: deftheorem defines BitFTA3Circ FTACELL1:def_20_:_ for am, bm, cm, dm, cin being set holds BitFTA3Circ (am,bm,cm,dm,cin) = (BitGFA3Circ (am,bm,cm)) +* (BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm)); theorem Th31: :: FTACELL1:31 for am, bm, cm, dm, cin being set holds InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = (({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} proof let am, bm, cm, dm, cin be set ; ::_thesis: InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = (({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} set S = BitFTA3Str (am,bm,cm,dm,cin); set S1 = BitGFA3Str (am,bm,cm); set A1 = GFA3AdderOutput (am,bm,cm); set C1 = GFA3CarryOutput (am,bm,cm); set S2 = BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm); set A2 = GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set C2 = GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set ambm0 = [<*am,bm*>,xor2]; set ambm = [<*am,bm*>,and2b]; set bmcm = [<*bm,cm*>,and2b]; set cmam = [<*cm,am*>,and2b]; set A1cin0 = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]; set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b]; set cindm = [<*cin,dm*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; BitGFA3Str (am,bm,cm) tolerates BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm) by CIRCCOMB:47; hence InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = (InnerVertices (BitGFA3Str (am,bm,cm))) \/ (InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm))) by CIRCCOMB:11 .= ((({[<*am,bm*>,xor2]} \/ {(GFA3AdderOutput (am,bm,cm))}) \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b]}) \/ {(GFA3CarryOutput (am,bm,cm))}) \/ (InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm))) by GFACIRC1:127 .= (({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b]}) \/ {(GFA3CarryOutput (am,bm,cm))}) \/ (InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm))) by ENUMSET1:1 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ ({[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b]} \/ {(GFA3CarryOutput (am,bm,cm))})) \/ (InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm))) by XBOOLE_1:4 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ (InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm))) by ENUMSET1:6 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ ((({[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]} \/ {(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]}) \/ {(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) by GFACIRC1:127 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ (({[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]}) \/ {(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) by ENUMSET1:1 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ ({[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} \/ ({[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]} \/ {(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))})) by XBOOLE_1:4 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ ({[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) by ENUMSET1:6 .= (({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} by XBOOLE_1:4 ; ::_thesis: verum end; theorem :: FTACELL1:32 for am, bm, cm, dm, cin being set holds InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) is Relation proof let am, bm, cm, dm, cin be set ; ::_thesis: InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) is Relation set S1 = BitGFA3Str (am,bm,cm); set A1 = GFA3AdderOutput (am,bm,cm); set S2 = BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm); ( InnerVertices (BitGFA3Str (am,bm,cm)) is Relation & InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) is Relation ) by GFACIRC1:128; hence InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) is Relation by FACIRC_1:3; ::_thesis: verum end; Lm31: for x, y, z, p being set holds GFA3AdderOutput (x,y,z) <> [p,and2b] proof let x, y, z be set ; ::_thesis: for p being set holds GFA3AdderOutput (x,y,z) <> [p,and2b] let p be set ; ::_thesis: GFA3AdderOutput (x,y,z) <> [p,and2b] set A1 = GFA3AdderOutput (x,y,z); now__::_thesis:_not_[p,and2b]_`2_=_(GFA3AdderOutput_(x,y,z))_`2 assume [p,and2b] `2 = (GFA3AdderOutput (x,y,z)) `2 ; ::_thesis: contradiction then A1: [p,and2b] `2 = xor2 by MCART_1:7; thus contradiction by A1, TWOSCOMP:9, TWOSCOMP:11; ::_thesis: verum end; hence GFA3AdderOutput (x,y,z) <> [p,and2b] ; ::_thesis: verum end; Lm32: for am, bm, cm being non pair set for x, y, z being set holds InputVertices (BitGFA3Str (am,bm,cm)) misses InnerVertices (BitGFA3Str (x,y,z)) proof let am, bm, cm be non pair set ; ::_thesis: for x, y, z being set holds InputVertices (BitGFA3Str (am,bm,cm)) misses InnerVertices (BitGFA3Str (x,y,z)) let x, y, z be set ; ::_thesis: InputVertices (BitGFA3Str (am,bm,cm)) misses InnerVertices (BitGFA3Str (x,y,z)) set S1 = BitGFA3Str (am,bm,cm); InputVertices (BitGFA3Str (am,bm,cm)) is without_pairs by GFACIRC1:131; hence InputVertices (BitGFA3Str (am,bm,cm)) misses InnerVertices (BitGFA3Str (x,y,z)) by FACIRC_1:5, GFACIRC1:128; ::_thesis: verum end; theorem Th33: :: FTACELL1:33 for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) = {am,bm,cm,dm,cin} proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) = {am,bm,cm,dm,cin} let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) implies InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) = {am,bm,cm,dm,cin} ) set S = BitFTA3Str (am,bm,cm,dm,cin); set S1 = BitGFA3Str (am,bm,cm); set A1 = GFA3AdderOutput (am,bm,cm); set C1 = GFA3CarryOutput (am,bm,cm); set S2 = BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm); set ambm0 = [<*am,bm*>,xor2]; set ambm = [<*am,bm*>,and2b]; set bmcm = [<*bm,cm*>,and2b]; set cmam = [<*cm,am*>,and2b]; set cindm = [<*cin,dm*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; assume that A1: cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] and A2: not cin in InnerVertices (BitGFA3Str (am,bm,cm)) ; ::_thesis: InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) = {am,bm,cm,dm,cin} A3: not dm in {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} by ENUMSET1:def_4; GFA3AdderOutput (am,bm,cm) in {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} by ENUMSET1:def_4; then A4: {(GFA3AdderOutput (am,bm,cm))} \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} = {} by ZFMISC_1:60; A5: InnerVertices (BitGFA3Str (am,bm,cm)) = (({[<*am,bm*>,xor2]} \/ {(GFA3AdderOutput (am,bm,cm))}) \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b]}) \/ {(GFA3CarryOutput (am,bm,cm))} by GFACIRC1:127 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b]}) \/ {(GFA3CarryOutput (am,bm,cm))} by ENUMSET1:1 .= {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ ({[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b]} \/ {(GFA3CarryOutput (am,bm,cm))}) by XBOOLE_1:4 .= {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2]} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} by ENUMSET1:6 .= {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} by ENUMSET1:12 ; then A6: {(GFA3AdderOutput (am,bm,cm)),cin,dm} \ (InnerVertices (BitGFA3Str (am,bm,cm))) = ({(GFA3AdderOutput (am,bm,cm))} \/ {cin,dm}) \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} by ENUMSET1:2 .= ({(GFA3AdderOutput (am,bm,cm))} \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ ({cin,dm} \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) by XBOOLE_1:42 .= ({cin} \/ {dm}) \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} by A4, ENUMSET1:1 .= ({cin} \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ ({dm} \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) by XBOOLE_1:42 .= {cin} \/ ({dm} \ {(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,xor2],[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) by A2, A5, ZFMISC_1:59 .= {cin} \/ {dm} by A3, ZFMISC_1:59 .= {cin,dm} by ENUMSET1:1 ; A7: GFA3AdderOutput (am,bm,cm) <> [<*cin,dm*>,and2b] by Lm31; ( InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) misses InputVertices (BitGFA3Str (am,bm,cm)) & BitGFA3Str (am,bm,cm) tolerates BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm) ) by Lm32, CIRCCOMB:47; hence InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) = (InputVertices (BitGFA3Str (am,bm,cm))) \/ ((InputVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm))) \ (InnerVertices (BitGFA3Str (am,bm,cm)))) by FACIRC_1:4 .= {am,bm,cm} \/ ((InputVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm))) \ (InnerVertices (BitGFA3Str (am,bm,cm)))) by GFACIRC1:130 .= {am,bm,cm} \/ ({(GFA3AdderOutput (am,bm,cm)),cin,dm} \ (InnerVertices (BitGFA3Str (am,bm,cm)))) by A1, A7, GFACIRC1:129 .= {am,bm,cm,dm,cin} by A6, ENUMSET1:9 ; ::_thesis: verum end; theorem Th34: :: FTACELL1:34 for am, bm, cm, dm, cin being set holds ( am in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & bm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & cm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & dm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & cin in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,xor2] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*bm,cm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cm,am*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cin,dm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) ) proof let am, bm, cm, dm, cin be set ; ::_thesis: ( am in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & bm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & cm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & dm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & cin in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,xor2] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*bm,cm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cm,am*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cin,dm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) ) set S1 = BitGFA3Str (am,bm,cm); set A1 = GFA3AdderOutput (am,bm,cm); set C1 = GFA3CarryOutput (am,bm,cm); set S2 = BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm); set A2 = GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set C2 = GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set ambm0 = [<*am,bm*>,xor2]; set ambm = [<*am,bm*>,and2b]; set bmcm = [<*bm,cm*>,and2b]; set cmam = [<*cm,am*>,and2b]; set A1cin0 = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]; set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b]; set cindm = [<*cin,dm*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; A1: ( cm in the carrier of (BitGFA3Str (am,bm,cm)) & [<*am,bm*>,xor2] in the carrier of (BitGFA3Str (am,bm,cm)) ) by GFACIRC1:132; A2: ( [<*am,bm*>,and2b] in the carrier of (BitGFA3Str (am,bm,cm)) & [<*bm,cm*>,and2b] in the carrier of (BitGFA3Str (am,bm,cm)) ) by GFACIRC1:132; A3: ( GFA3AdderOutput (am,bm,cm) in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) & cin in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) ) by GFACIRC1:132; A4: ( [<*cm,am*>,and2b] in the carrier of (BitGFA3Str (am,bm,cm)) & GFA3CarryOutput (am,bm,cm) in the carrier of (BitGFA3Str (am,bm,cm)) ) by GFACIRC1:132; A5: GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) by GFACIRC1:132; A6: ( [<*cin,dm*>,and2b] in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) & [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) ) by GFACIRC1:132; A7: ( GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) ) by GFACIRC1:132; A8: ( dm in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) ) by GFACIRC1:132; ( am in the carrier of (BitGFA3Str (am,bm,cm)) & bm in the carrier of (BitGFA3Str (am,bm,cm)) ) by GFACIRC1:132; hence ( am in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & bm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & cm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & dm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & cin in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,xor2] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*bm,cm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cm,am*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cin,dm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, A2, A4, A3, A8, A7, A6, A5, FACIRC_1:20; ::_thesis: verum end; theorem Th35: :: FTACELL1:35 for am, bm, cm, dm, cin being set holds ( [<*am,bm*>,xor2] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput (am,bm,cm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*bm,cm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cm,am*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput (am,bm,cm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cin,dm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) proof let am, bm, cm, dm, cin be set ; ::_thesis: ( [<*am,bm*>,xor2] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput (am,bm,cm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*bm,cm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cm,am*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput (am,bm,cm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cin,dm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) set S = BitFTA3Str (am,bm,cm,dm,cin); set A1 = GFA3AdderOutput (am,bm,cm); set C1 = GFA3CarryOutput (am,bm,cm); set A2 = GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set C2 = GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set ambm0 = [<*am,bm*>,xor2]; set ambm = [<*am,bm*>,and2b]; set bmcm = [<*bm,cm*>,and2b]; set cmam = [<*cm,am*>,and2b]; set A1cin0 = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]; set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b]; set cindm = [<*cin,dm*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; set p1 = {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}; set p2 = {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}; A1: ( [<*am,bm*>,xor2] in {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} & GFA3AdderOutput (am,bm,cm) in {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} ) by ENUMSET1:def_4; A2: ( [<*am,bm*>,and2b] in {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} & [<*bm,cm*>,and2b] in {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} ) by ENUMSET1:def_4; A3: ( [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} & GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} ) by ENUMSET1:def_4; A4: ( [<*cm,am*>,and2b] in {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} & GFA3CarryOutput (am,bm,cm) in {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} ) by ENUMSET1:def_4; A5: ( [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} & GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} ) by ENUMSET1:def_4; A6: ( [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} & [<*cin,dm*>,and2b] in {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} ) by ENUMSET1:def_4; InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = (({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm))} \/ {[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} by Th31 .= ({[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} by ENUMSET1:12 .= {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} \/ ({[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))}) by XBOOLE_1:4 .= {[<*am,bm*>,xor2],(GFA3AdderOutput (am,bm,cm)),[<*am,bm*>,and2b],[<*bm,cm*>,and2b],[<*cm,am*>,and2b],(GFA3CarryOutput (am,bm,cm))} \/ {[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],(GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)),[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b],(GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm))} by ENUMSET1:12 ; hence ( [<*am,bm*>,xor2] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput (am,bm,cm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*am,bm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*bm,cm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cm,am*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput (am,bm,cm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cin,dm*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) & GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, A2, A4, A3, A6, A5, XBOOLE_0:def_3; ::_thesis: verum end; theorem Th36: :: FTACELL1:36 for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) implies ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) ) set S = BitFTA3Str (am,bm,cm,dm,cin); set S1 = BitGFA3Str (am,bm,cm); set A1 = GFA3AdderOutput (am,bm,cm); set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; assume ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) ) ; ::_thesis: ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) then InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) = {am,bm,cm,dm,cin} by Th33; hence ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by ENUMSET1:def_3; ::_thesis: verum end; definition let am, bm, cm, dm, cin be set ; func BitFTA3CarryOutput (am,bm,cm,dm,cin) -> Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) equals :: FTACELL1:def 21 GFA3CarryOutput (am,bm,cm); coherence GFA3CarryOutput (am,bm,cm) is Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; func BitFTA3AdderOutputI (am,bm,cm,dm,cin) -> Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) equals :: FTACELL1:def 22 GFA3AdderOutput (am,bm,cm); coherence GFA3AdderOutput (am,bm,cm) is Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; func BitFTA3AdderOutputP (am,bm,cm,dm,cin) -> Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) equals :: FTACELL1:def 23 GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); coherence GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) is Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; func BitFTA3AdderOutputQ (am,bm,cm,dm,cin) -> Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) equals :: FTACELL1:def 24 GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); coherence GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) is Element of InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; end; :: deftheorem defines BitFTA3CarryOutput FTACELL1:def_21_:_ for am, bm, cm, dm, cin being set holds BitFTA3CarryOutput (am,bm,cm,dm,cin) = GFA3CarryOutput (am,bm,cm); :: deftheorem defines BitFTA3AdderOutputI FTACELL1:def_22_:_ for am, bm, cm, dm, cin being set holds BitFTA3AdderOutputI (am,bm,cm,dm,cin) = GFA3AdderOutput (am,bm,cm); :: deftheorem defines BitFTA3AdderOutputP FTACELL1:def_23_:_ for am, bm, cm, dm, cin being set holds BitFTA3AdderOutputP (am,bm,cm,dm,cin) = GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); :: deftheorem defines BitFTA3AdderOutputQ FTACELL1:def_24_:_ for am, bm, cm, dm, cin being set holds BitFTA3AdderOutputQ (am,bm,cm,dm,cin) = GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); theorem :: FTACELL1:37 for am, bm, cm being non pair set for dm, cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm holds ( (Following (s,2)) . (BitFTA3CarryOutput (am,bm,cm,dm,cin)) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) proof let am, bm, cm be non pair set ; ::_thesis: for dm, cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm holds ( (Following (s,2)) . (BitFTA3CarryOutput (am,bm,cm,dm,cin)) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) let dm, cin be set ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm holds ( (Following (s,2)) . (BitFTA3CarryOutput (am,bm,cm,dm,cin)) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a1, a2, a3 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm holds ( (Following (s,2)) . (BitFTA3CarryOutput (am,bm,cm,dm,cin)) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) set S1 = BitGFA3Str (am,bm,cm); set C1 = BitGFA3Circ (am,bm,cm); set A1 = GFA3AdderOutput (am,bm,cm); set A2 = GFA3CarryOutput (am,bm,cm); set S2 = BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm); set C2 = BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm); let a1, a2, a3 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bm & a3 = s . cm implies ( (Following (s,2)) . (BitFTA3CarryOutput (am,bm,cm,dm,cin)) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) ) assume that A1: a1 = s . am and A2: a2 = s . bm and A3: a3 = s . cm ; ::_thesis: ( (Following (s,2)) . (BitFTA3CarryOutput (am,bm,cm,dm,cin)) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) & (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) reconsider s1 = s | the carrier of (BitGFA3Str (am,bm,cm)) as State of (BitGFA3Circ (am,bm,cm)) by FACIRC_1:26; A4: dom s1 = the carrier of (BitGFA3Str (am,bm,cm)) by CIRCUIT1:3; am in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then A5: a1 = s1 . am by A1, A4, FUNCT_1:47; reconsider t = s as State of ((BitGFA3Circ (am,bm,cm)) +* (BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm))) ; A6: InputVertices (BitGFA3Str (am,bm,cm)) misses InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) by Lm32; cm in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then A7: a3 = s1 . cm by A3, A4, FUNCT_1:47; bm in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then A8: a2 = s1 . bm by A2, A4, FUNCT_1:47; GFA3CarryOutput (am,bm,cm) in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then (Following (t,2)) . (GFA3CarryOutput (am,bm,cm)) = (Following (s1,2)) . (GFA3CarryOutput (am,bm,cm)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA3CarryOutput (am,bm,cm,dm,cin)) = 'not' (((('not' a1) '&' ('not' a2)) 'or' (('not' a2) '&' ('not' a3))) 'or' (('not' a3) '&' ('not' a1))) by A5, A8, A7, GFACIRC1:135; ::_thesis: (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) GFA3AdderOutput (am,bm,cm) in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then (Following (t,2)) . (GFA3AdderOutput (am,bm,cm)) = (Following (s1,2)) . (GFA3AdderOutput (am,bm,cm)) by A6, FACIRC_1:32; hence (Following (s,2)) . (BitFTA3AdderOutputI (am,bm,cm,dm,cin)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) by A5, A8, A7, GFACIRC1:135; ::_thesis: verum end; theorem Th38: :: FTACELL1:38 for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) implies for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) ) ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) set A1 = GFA3AdderOutput (am,bm,cm); set C1 = BitGFA3Circ (am,bm,cm); set S1 = BitGFA3Str (am,bm,cm); set S2 = BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm); set C2 = BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm); set S = BitFTA3Str (am,bm,cm,dm,cin); let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin implies ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) ) assume that A2: a1 = s . am and A3: a2 = s . bm and A4: a3 = s . cm and A5: a4 = s . dm and A6: a5 = s . cin ; ::_thesis: ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) reconsider s1 = s | the carrier of (BitGFA3Str (am,bm,cm)) as State of (BitGFA3Circ (am,bm,cm)) by FACIRC_1:26; A7: dom s1 = the carrier of (BitGFA3Str (am,bm,cm)) by CIRCUIT1:3; A8: dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; then A9: (Following s) . dm = a4 by A5, CIRCUIT2:def_5; A10: cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; then A11: (Following s) . cm = a3 by A4, CIRCUIT2:def_5; bm in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then A12: a2 = s1 . bm by A3, A7, FUNCT_1:47; reconsider t = s as State of ((BitGFA3Circ (am,bm,cm)) +* (BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm))) ; ( GFA3AdderOutput (am,bm,cm) in the carrier of (BitGFA3Str (am,bm,cm)) & InputVertices (BitGFA3Str (am,bm,cm)) misses InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) ) by Lm32, GFACIRC1:132; then A13: (Following (t,2)) . (GFA3AdderOutput (am,bm,cm)) = (Following (s1,2)) . (GFA3AdderOutput (am,bm,cm)) by FACIRC_1:32; cm in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then A14: a3 = s1 . cm by A4, A7, FUNCT_1:47; am in the carrier of (BitGFA3Str (am,bm,cm)) by GFACIRC1:132; then a1 = s1 . am by A2, A7, FUNCT_1:47; hence (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) by A12, A14, A13, GFACIRC1:135; ::_thesis: ( (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) A15: bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; then A16: (Following s) . bm = a2 by A3, CIRCUIT2:def_5; A17: cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; then A18: (Following s) . cin = a5 by A6, CIRCUIT2:def_5; A19: am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; then ( Following (s,2) = Following (Following s) & (Following s) . am = a1 ) by A2, CIRCUIT2:def_5, FACIRC_1:15; hence ( (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 & (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 & (Following (s,2)) . cin = a5 ) by A19, A15, A10, A8, A17, A16, A11, A9, A18, CIRCUIT2:def_5; ::_thesis: verum end; Lm33: for am, bm, cm, dm being non pair set for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ('not' a123) '&' ('not' a5) & (Following s) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) ) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ('not' a123) '&' ('not' a5) & (Following s) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) ) let cin be set ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ('not' a123) '&' ('not' a5) & (Following s) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) ) set S = BitFTA3Str (am,bm,cm,dm,cin); set C = BitFTA3Circ (am,bm,cm,dm,cin); set A1 = GFA3AdderOutput (am,bm,cm); set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b]; set cindm = [<*cin,dm*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a123, a4, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a4 = s . dm & a5 = s . cin holds ( (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ('not' a123) '&' ('not' a5) & (Following s) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) ) let a123, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA3AdderOutput (am,bm,cm)) & a4 = s . dm & a5 = s . cin implies ( (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ('not' a123) '&' ('not' a5) & (Following s) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) ) ) assume that A1: a123 = s . (GFA3AdderOutput (am,bm,cm)) and A2: a4 = s . dm and A3: a5 = s . cin ; ::_thesis: ( (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ('not' a123) '&' ('not' a5) & (Following s) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) ) A4: dom s = the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) by CIRCUIT1:3; A5: cin in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) by Th34; A6: GFA3AdderOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) by Th34; A7: InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by FACIRC_1:37; then [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; hence (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = and2b . (s * <*(GFA3AdderOutput (am,bm,cm)),cin*>) by FACIRC_1:35 .= and2b . <*a123,a5*> by A1, A3, A6, A5, A4, FINSEQ_2:125 .= ('not' a123) '&' ('not' a5) by TWOSCOMP:def_3 ; ::_thesis: ( (Following s) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) ) A8: dm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) by Th34; [<*cin,dm*>,and2b] in the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by A7, Th35; hence (Following s) . [<*cin,dm*>,and2b] = and2b . (s * <*cin,dm*>) by FACIRC_1:35 .= and2b . <*a5,a4*> by A2, A3, A8, A5, A4, FINSEQ_2:125 .= ('not' a5) '&' ('not' a4) by TWOSCOMP:def_3 ; ::_thesis: (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ('not' a123) [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by A7, Th35; hence (Following s) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = and2b . (s * <*dm,(GFA3AdderOutput (am,bm,cm))*>) by FACIRC_1:35 .= and2b . <*a4,a123*> by A1, A2, A6, A8, A4, FINSEQ_2:125 .= ('not' a4) '&' ('not' a123) by TWOSCOMP:def_3 ; ::_thesis: verum end; Lm34: for am, bm, cm, dm being non pair set for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a5 = s . cin holds (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = a123 'xor' a5 proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a5 = s . cin holds (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = a123 'xor' a5 let cin be set ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a5 = s . cin holds (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = a123 'xor' a5 set S = BitFTA3Str (am,bm,cm,dm,cin); set C = BitFTA3Circ (am,bm,cm,dm,cin); set A1 = GFA3AdderOutput (am,bm,cm); set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]; let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a123, a5 being Element of BOOLEAN st a123 = s . (GFA3AdderOutput (am,bm,cm)) & a5 = s . cin holds (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = a123 'xor' a5 let a123, a5 be Element of BOOLEAN ; ::_thesis: ( a123 = s . (GFA3AdderOutput (am,bm,cm)) & a5 = s . cin implies (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = a123 'xor' a5 ) assume A1: ( a123 = s . (GFA3AdderOutput (am,bm,cm)) & a5 = s . cin ) ; ::_thesis: (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = a123 'xor' a5 A2: dom s = the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) by CIRCUIT1:3; A3: ( GFA3AdderOutput (am,bm,cm) in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & cin in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) ) by Th34; InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by FACIRC_1:37; then [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; hence (Following s) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = xor2 . (s * <*(GFA3AdderOutput (am,bm,cm)),cin*>) by FACIRC_1:35 .= xor2 . <*a123,a5*> by A1, A3, A2, FINSEQ_2:125 .= a123 'xor' a5 by TWOSCOMP:def_13 ; ::_thesis: verum end; Lm35: for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) implies for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) ) ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA3Str (am,bm,cm,dm,cin); A2: ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; A3: ( cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A5: (Following (s,2)) . cin = a5 by A1, A4, Th38; set cindm = [<*cin,dm*>,and2b]; set A1 = GFA3AdderOutput (am,bm,cm); set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . dm = a4 ) by A1, A4, Th38; hence ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) & (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) ) by A6, A5, Lm33; ::_thesis: ( (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A7: ( (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 ) by A1, A4, Th38; A8: (Following (s,2)) . cin = a5 by A1, A4, Th38; A9: cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; ( (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 ) by A1, A4, Th38; hence ( (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm36: for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) implies for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) ) ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) set S = BitFTA3Str (am,bm,cm,dm,cin); A2: ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; A3: ( cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin implies ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A5: ( (Following (s,2)) . cm = a3 & (Following (s,2)) . dm = a4 ) by A1, A4, Th38; set A1 = GFA3AdderOutput (am,bm,cm); set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]; A6: Following (s,(2 + 1)) = Following (Following (s,2)) by FACIRC_1:12; ( (Following (s,2)) . (GFA3AdderOutput (am,bm,cm)) = 'not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) & (Following (s,2)) . cin = a5 ) by A1, A4, Th38; hence (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 by A6, Lm34; ::_thesis: ( (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) A7: (Following (s,2)) . cin = a5 by A1, A4, Th38; A8: cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; ( (Following (s,2)) . am = a1 & (Following (s,2)) . bm = a2 ) by A1, A4, Th38; hence ( (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 & (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 & (Following (s,3)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; Lm37: for am, bm, cm, dm being non pair set for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] & a123y = s . [<*cin,dm*>,and2b] & a123z = s . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] holds (Following s) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] & a123y = s . [<*cin,dm*>,and2b] & a123z = s . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] holds (Following s) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) let cin be set ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] & a123y = s . [<*cin,dm*>,and2b] & a123z = s . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] holds (Following s) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) set S = BitFTA3Str (am,bm,cm,dm,cin); set C = BitFTA3Circ (am,bm,cm,dm,cin); set A1 = GFA3AdderOutput (am,bm,cm); set A2 = GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b]; set cindm = [<*cin,dm*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a123x, a123y, a123z being Element of BOOLEAN st a123x = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] & a123y = s . [<*cin,dm*>,and2b] & a123z = s . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] holds (Following s) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) let a123x, a123y, a123z be Element of BOOLEAN ; ::_thesis: ( a123x = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] & a123y = s . [<*cin,dm*>,and2b] & a123z = s . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] implies (Following s) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) ) assume A1: ( a123x = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] & a123y = s . [<*cin,dm*>,and2b] & a123z = s . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] ) ; ::_thesis: (Following s) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((a123x 'or' a123y) 'or' a123z) A2: ( [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & [<*cin,dm*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) ) by Th34; A3: ( [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & dom s = the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) ) by Th34, CIRCUIT1:3; InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by FACIRC_1:37; then GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; hence (Following s) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = nor3 . (s * <*[<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b],[<*cin,dm*>,and2b],[<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]*>) by FACIRC_1:35 .= nor3 . <*a123x,a123y,a123z*> by A1, A2, A3, FINSEQ_2:126 .= 'not' ((a123x 'or' a123y) 'or' a123z) by TWOSCOMP:def_28 ; ::_thesis: verum end; Lm38: for am, bm, cm, dm being non pair set for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] & a4 = s . dm holds (Following s) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = a1235 'xor' a4 proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] & a4 = s . dm holds (Following s) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = a1235 'xor' a4 let cin be set ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] & a4 = s . dm holds (Following s) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = a1235 'xor' a4 set S = BitFTA3Str (am,bm,cm,dm,cin); set C = BitFTA3Circ (am,bm,cm,dm,cin); set A1 = GFA3AdderOutput (am,bm,cm); set A2 = GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]; let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a1235, a4 being Element of BOOLEAN st a1235 = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] & a4 = s . dm holds (Following s) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = a1235 'xor' a4 let a1235, a4 be Element of BOOLEAN ; ::_thesis: ( a1235 = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] & a4 = s . dm implies (Following s) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = a1235 'xor' a4 ) assume A1: ( a1235 = s . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] & a4 = s . dm ) ; ::_thesis: (Following s) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = a1235 'xor' a4 A2: dom s = the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) by CIRCUIT1:3; A3: ( [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) & dm in the carrier of (BitFTA3Str (am,bm,cm,dm,cin)) ) by Th34; InnerVertices (BitFTA3Str (am,bm,cm,dm,cin)) = the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by FACIRC_1:37; then GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm) in the carrier' of (BitFTA3Str (am,bm,cm,dm,cin)) by Th35; hence (Following s) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = xor2 . (s * <*[<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2],dm*>) by FACIRC_1:35 .= xor2 . <*a1235,a4*> by A1, A3, A2, FINSEQ_2:125 .= a1235 'xor' a4 by TWOSCOMP:def_13 ; ::_thesis: verum end; Lm39: for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) implies for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) ) ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA3Str (am,bm,cm,dm,cin); A2: ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; A3: ( cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; set A1 = GFA3AdderOutput (am,bm,cm); let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin implies ( (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A5: (Following (s,3)) . [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] = ('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) by A1, A4, Lm35; set cindm = [<*cin,dm*>,and2b]; set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b]; set A2 = GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,and2b] = ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5) & (Following (s,3)) . [<*cin,dm*>,and2b] = ('not' a5) '&' ('not' a4) ) by A1, A4, Lm35; hence (Following (s,4)) . (GFA3CarryOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) by A6, A5, Lm37; ::_thesis: ( (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A7: ( (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 ) by A1, A4, Lm35; A8: (Following (s,3)) . cin = a5 by A1, A4, Lm35; A9: cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; ( (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 ) by A1, A4, Lm35; hence ( (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A9, A7, A8, CIRCUIT2:def_5; ::_thesis: verum end; Lm40: for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) proof let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) implies for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A1: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) ) ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) set S = BitFTA3Str (am,bm,cm,dm,cin); A2: ( am in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & bm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; A3: ( cm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) & dm in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) ) by A1, Th36; let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) let a1, a2, a3, a4, a5 be Element of BOOLEAN ; ::_thesis: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin implies ( (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) ) assume A4: ( a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin ) ; ::_thesis: ( (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) & (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A5: ( (Following (s,3)) . cm = a3 & (Following (s,3)) . dm = a4 ) by A1, A4, Lm36; set A1 = GFA3AdderOutput (am,bm,cm); set A2 = GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm); set A1cin = [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2]; A6: Following (s,(3 + 1)) = Following (Following (s,3)) by FACIRC_1:12; ( (Following (s,3)) . [<*(GFA3AdderOutput (am,bm,cm)),cin*>,xor2] = ('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5 & (Following (s,3)) . dm = a4 ) by A1, A4, Lm36; hence (Following (s,4)) . (GFA3AdderOutput ((GFA3AdderOutput (am,bm,cm)),cin,dm)) = (('not' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3))) 'xor' a5) 'xor' a4 by A6, Lm38 .= 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a5)) 'xor' ('not' a4)) by XBOOLEAN:74 .= 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) by XBOOLEAN:73 ; ::_thesis: ( (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) A7: (Following (s,3)) . cin = a5 by A1, A4, Lm36; A8: cin in InputVertices (BitFTA3Str (am,bm,cm,dm,cin)) by A1, Th36; ( (Following (s,3)) . am = a1 & (Following (s,3)) . bm = a2 ) by A1, A4, Lm36; hence ( (Following (s,4)) . am = a1 & (Following (s,4)) . bm = a2 & (Following (s,4)) . cm = a3 & (Following (s,4)) . dm = a4 & (Following (s,4)) . cin = a5 ) by A6, A2, A3, A8, A5, A7, CIRCUIT2:def_5; ::_thesis: verum end; theorem :: FTACELL1:39 for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] & not cin in InnerVertices (BitGFA3Str (am,bm,cm)) holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) for a1, a2, a3, a4, a5 being Element of BOOLEAN st a1 = s . am & a2 = s . bm & a3 = s . cm & a4 = s . dm & a5 = s . cin holds ( (Following (s,4)) . (BitFTA3AdderOutputP (am,bm,cm,dm,cin)) = 'not' (((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) '&' ('not' a5)) 'or' (('not' a5) '&' ('not' a4))) 'or' (('not' a4) '&' ((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)))) & (Following (s,4)) . (BitFTA3AdderOutputQ (am,bm,cm,dm,cin)) = 'not' ((((('not' a1) 'xor' ('not' a2)) 'xor' ('not' a3)) 'xor' ('not' a4)) 'xor' ('not' a5)) ) by Lm39, Lm40; theorem :: FTACELL1:40 for am, bm, cm, dm being non pair set for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) holds Following (s,4) is stable proof set n1 = 2; set n2 = 2; let am, bm, cm, dm be non pair set ; ::_thesis: for cin being set st cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] holds for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) holds Following (s,4) is stable let cin be set ; ::_thesis: ( cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] implies for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) holds Following (s,4) is stable ) set C = BitFTA3Circ (am,bm,cm,dm,cin); set S1 = BitGFA3Str (am,bm,cm); set C1 = BitGFA3Circ (am,bm,cm); set A1 = GFA3AdderOutput (am,bm,cm); set S2 = BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm); set C2 = BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm); set cindm = [<*cin,dm*>,and2b]; set dmA1 = [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b]; assume A1: cin <> [<*dm,(GFA3AdderOutput (am,bm,cm))*>,and2b] ; ::_thesis: for s being State of (BitFTA3Circ (am,bm,cm,dm,cin)) holds Following (s,4) is stable let s be State of (BitFTA3Circ (am,bm,cm,dm,cin)); ::_thesis: Following (s,4) is stable BitGFA3Circ (am,bm,cm) tolerates BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm) by CIRCCOMB:60; then A2: the Sorts of (BitGFA3Circ (am,bm,cm)) tolerates the Sorts of (BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm)) by CIRCCOMB:def_3; then reconsider s1 = s | the carrier of (BitGFA3Str (am,bm,cm)) as State of (BitGFA3Circ (am,bm,cm)) by CIRCCOMB:26; reconsider s2 = (Following (s,2)) | the carrier of (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) as State of (BitGFA3Circ ((GFA3AdderOutput (am,bm,cm)),cin,dm)) by A2, CIRCCOMB:26; A3: ( InputVertices (BitGFA3Str (am,bm,cm)) misses InnerVertices (BitGFA3Str ((GFA3AdderOutput (am,bm,cm)),cin,dm)) & Following (s1,2) is stable ) by Lm32, GFACIRC1:136; GFA3AdderOutput (am,bm,cm) <> [<*cin,dm*>,and2b] by Lm31; then Following (s2,2) is stable by A1, GFACIRC1:136; then Following (s,(2 + 2)) is stable by A3, CIRCCMB2:19, CIRCCOMB:60; hence Following (s,4) is stable ; ::_thesis: verum end;