@MISC{FACIRC_1.MIZ,
  AUTHOR = {Bancerek, Grzegorz and Nakamura, Yatsuka},
  TITLE = {Full Adder Circuit.  {P}art {I}},
  NOTE = {This work was written while the first author visited Shinshu University,
July--August 1994.},
  SECTION1 = {Combining of Many Sorted Signatures},
  SECTION2 = {Combining of Circuits},
  SECTION3 = {Signatures with One Operation},
  SECTION4 = {Unsplit Condition},
  SECTION5 = {One Gate Circuits},
  SECTION6 = {Boolean Circuits},
  SECTION7 = {One Bit Adder},
  DAY = {10},
  MONTH = {August},
  YEAR = {1995},
  ADDRESS1 = {Institute of Mathematics\\Polish Academy of Sciences},
  ADDRESS2 = {Shinshu University\\Nagano},
  SUMMARY = {We continue the formalisation of circuits started by Piotr Rudnicki,
Andrzej Trybulec, Pauline Kawamoto, and the second author in
 \cite{PRE_CIRC.ABS}, \cite{MSAFREE2.ABS}, \cite{CIRCUIT1.ABS},
  \cite{CIRCUIT2.ABS}.
The first step in proving properties of full $n$-bit adder circuit,
i.e. 1-bit adder, is presented.
We employ the notation of combining circuits
introduced in \cite{CIRCCOMB.ABS}.}}

