@MISC{GATE_2.MIZ,
  AUTHOR = {Yang, Yuguang and Wasaki, Katsumi and Fuwa, Yasushi and Nakamura, Yatsuka},
  TITLE = {Correctness of Binary Counter Circuits},
  DAY = {13},
  MONTH = {March},
  YEAR = {1999},
  ADDRESS1 = {Shinshu University\\Nagano},
  ADDRESS2 = {Shinshu University\\Nagano},
  ADDRESS3 = {Shinshu University\\Nagano},
  ADDRESS4 = {Shinshu University\\Nagano},
  SUMMARY = {This article introduces the verification of the correctness for the
operations and the specification of the 3-bit counter. Both cases:
without reset input and with reset input are considered. The proof
was proposed by Y. Nakamura in \cite{GATE_1.ABS}.}}

