reserve s, s1, s2 for State of SCM+FSA,
  p, p1 for Instruction-Sequence of SCM+FSA,
  a, b for Int-Location,
  d for read-write Int-Location,
  f for FinSeq-Location,
  I for MacroInstruction of SCM+FSA,
  J for good MacroInstruction of SCM+FSA,
  k, m for Nat;

theorem Th6:
  StepTimes(a,J,p,s).0.intloc 0 = 1
proof
  set I = J;
  set ST = StepTimes(a,I,p,s);
  set au = 1-stRWNotIn({a} \/ UsedILoc I);
  set Is = Initialized s;
  thus ST.0.intloc 0 = Exec(au := a, Is).intloc 0 by SCMFSA_9:def 5
    .= Is.intloc 0 by SCMFSA_2:63
    .= 1 by SCMFSA_M:9;
end;
