reserve s for State of SCM+FSA,
  a, c for read-write Int-Location,
  aa, bb, cc,
  dd, x for Int-Location,
  f for FinSeq-Location,
  I, J for MacroInstruction of SCM+FSA,
  Ig for good MacroInstruction of SCM+FSA,
  i, k for Nat,
  p for Instruction-Sequence of SCM+FSA;

theorem Th8:
  s.intloc 0 = 1 implies StepForUp(a,bb,cc,I,p,s).0.intloc 0 = 1
proof
  set aux = 1-stRWNotIn ({a, bb, cc} \/ UsedILoc I);
  set S = s+*(aux, s.cc-s.bb+1)+*(a, s.bb);
A1: S.intloc 0 = (s+*(aux, s.cc-s.bb+1)).intloc 0 by FUNCT_7:32
    .= s.intloc 0 by FUNCT_7:32;
  assume s.intloc 0 = 1;
  hence thesis by A1,SCMFSA_9:def 5;
end;
