reserve s, s1, s2 for State of SCM+FSA,
  p, p1 for Instruction-Sequence of SCM+FSA,
  a, b for Int-Location,
  d for read-write Int-Location,
  f for FinSeq-Location,
  I for MacroInstruction of SCM+FSA,
  J for good MacroInstruction of SCM+FSA,
  k, m for Nat;

theorem Th9:
  s.intloc 0 = 1 or a is read-write implies StepTimes(a,I,p,s).0.a
  = s.a
proof
  set ST = StepTimes(a,I,p,s);
  set au = 1-stRWNotIn ({a} \/ UsedILoc I);
  set Is = Initialized s;
  assume
A1: s.intloc 0 = 1 or a is read-write;
A2: a = intloc 0 or a is read-write by SCMFSA_M:def 2;
  a in {a} by TARSKI:def 1;
  then a in {a} \/ UsedILoc I by XBOOLE_0:def 3;
  then
A3: au <> a by SCMFSA_M:25;
  thus ST.0.a = Exec(au := a, Is).a by SCMFSA_9:def 5
    .= Is.a by A3,SCMFSA_2:63
    .= s.a by A1,A2,SCMFSA_M:9,37;
end;
