reserve IIG for monotonic Circuit-like non void non empty ManySortedSign;
reserve SCS for non-empty Circuit of IIG;
reserve s for State of SCS;
reserve iv for InputValues of SCS;
reserve IIG for finite monotonic Circuit-like non void non empty
  ManySortedSign;
reserve SCS for non-empty Circuit of IIG;
reserve InpFs for InputFuncs of SCS;
reserve s for State of SCS;
reserve iv for InputValues of SCS;

theorem Th14:
  commute InpFs is constant & InputVertices IIG is non empty
implies for s, iv st iv = (commute InpFs).0 for k being Nat holds iv
  c= (Computation(s,InpFs)).k
proof
  assume that
A1: commute InpFs is constant and
A2: InputVertices IIG is non empty;
A3: dom commute InpFs = NAT by A2,PRE_CIRC:5;
  let s, iv;
  assume
A4: iv = (commute InpFs).0;
  let k be Nat;
A5: k in NAT by ORDINAL1:def 12;
  IIG is with_input_V by A2;
  then
A6: k-th_InputValues InpFs = (commute InpFs).k by CIRCUIT1:def 2
    .= iv by A1,A4,A3,FUNCT_1:def 10,A5;
  set Ck = (Computation(s,InpFs)).k;
  dom iv = InputVertices IIG & dom Set-Constants SCS = SortsWithConstants
  IIG by PARTFUN1:def 2;
  then
A7: dom iv misses dom Set-Constants SCS by MSAFREE2:4;
  per cases by NAT_1:6;
  suppose
A8: k = 0;
    then Ck = InitialComp(s,InpFs) by Def9
      .= s +* (0-th_InputValues InpFs) +* Set-Constants SCS;
    hence thesis by A6,A7,A8,FUNCT_4:25,124;
  end;
  suppose
    ex n being Nat st k=n+1;
    then consider n being Nat such that
A9: k=n+1;
    reconsider n as Element of NAT by ORDINAL1:def 12;
    reconsider Cn = (Computation(s,InpFs)).n as State of SCS;
    Ck = Following(Cn,k-th_InputValues InpFs) by A9,Def9
      .= Following(Cn+*iv) by A6;
    hence thesis by Th12,FUNCT_4:25;
  end;
end;
