reserve l, m, n for Nat,
  i,j,k for Instruction of SCMPDS,
  I,J,K for Program of SCMPDS,
  p,q,r for PartState of SCMPDS;
reserve a,b,c for Int_position,
  s,s1,s2 for State of SCMPDS,
  k1,k2 for Integer;
reserve x for set;
reserve l,l1,loc for Nat;
reserve l1,l2 for Nat,
  i1,i2 for Instruction of SCMPDS;
reserve l for Nat;

theorem Th26:
  for s1,s2 being State of SCMPDS, n,m being Nat, i
being Instruction of SCMPDS holds IC s1= m & i valid_at m & InsCode i <>
  1 & InsCode i <> 3 & IC s1 + n = IC s2 & DataPart s1 = DataPart s2 implies
  IC Exec(i,s1) + n = IC Exec(i,s2) & DataPart Exec(i,s1) = DataPart Exec(i,s2)
proof
  let s1,s2 be State of SCMPDS, n,m be Nat;
  let i be Instruction of SCMPDS;
  assume that
A1: IC s1= m and
A2: i valid_at m and
A3: InsCode i <> 1 & InsCode i <> 3 and
A4: IC s1 + n = IC s2 and
A5: DataPart s1 = DataPart s2;
A6: now
    let a,k1;
    thus s1.DataLoc(s1.a,k1) =s1.DataLoc(s2.a,k1) by A5,Th7
      .=s2.DataLoc(s2.a,k1) by A5,Th7;
  end;
  reconsider k1 = IC s1 as Nat;
  set Ci=InsCode i;
A7: IC s1 + 1 + n = IC s2 + 1 by A4;
A8: now
    assume
    Ci <> 0 & Ci <> 14 & Ci<>1 & Ci<>4 & Ci<>5 & Ci<> 6;
    then
A9: not Ci in {0,1,4,5,6,14} by ENUMSET1:def 4;
    then IC Exec(i,s1) = IC s1 + 1 by Th1;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A7,A9,Th1;
  end;
  Ci = 0 or ... or Ci = 14 by SCMPDS_2:6;
  then per cases by A3;
  suppose Ci = 0;
   then
A10:  Exec(i,s1) = s1 & Exec(i,s2) = s2 by SCMPDS_2:86;
   hence IC Exec(i,s1) + n = IC Exec(i,s2) by A4;
   thus DataPart Exec(i,s1) = DataPart Exec(i,s2) by A5,A10;
  end;
  suppose
    Ci = 14;
    then consider k1 such that
A11: i = goto k1 and
A12: m+k1 >= 0 by A2;
    IC Exec(i,s1) = ICplusConst(s1,k1) by A11,SCMPDS_2:54;
    hence IC Exec(i,s1) + n = ICplusConst(s2,k1) by A1,A4,A12,Th25
      .= IC Exec(i,s2) by A11,SCMPDS_2:54;
    now
      let a;
      thus Exec(i, s1).a = s1.a by A11,SCMPDS_2:54
        .=s2.a by A5,Th7
        .=Exec(i, s2).a by A11,SCMPDS_2:54;
    end;
    hence thesis by Th7;
  end;
  suppose
A13: Ci = 2;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,k1 such that
A14: i = a := k1 by A13,SCMPDS_2:28;
    now
      let b;
      per cases;
      suppose
A15:    a=b;
        hence Exec(i, s1).b= k1 by A14,SCMPDS_2:45
          .=Exec(i,s2).b by A14,A15,SCMPDS_2:45;
      end;
      suppose
A16:    a<>b;
        hence Exec(i,s1).b = s1.b by A14,SCMPDS_2:45
          .=s2.b by A5,Th7
          .=Exec(i,s2).b by A14,A16,SCMPDS_2:45;
      end;
    end;
    hence thesis by Th7;
  end;
  suppose
    Ci = 4;
    then consider a,k1,k2 such that
A17: i = (a,k1)<>0_goto k2 and
A18: m+k2 >= 0 by A2;
    hereby
      per cases;
      suppose
A19:    s1.DataLoc(s1.a,k1) <> 0;
        then
A20:    s2.DataLoc(s2.a,k1) <> 0 by A6;
        IC Exec(i,s1) = ICplusConst(s1,k2) by A17,A19,SCMPDS_2:55;
        hence IC Exec(i,s1) + n = ICplusConst(s2,k2) by A1,A4,A18,Th25
          .= IC Exec(i,s2) by A17,A20,SCMPDS_2:55;
      end;
      suppose
        s1.DataLoc(s1.a,k1) = 0;
        then s2.DataLoc(s2.a,k1) = 0 & IC Exec(i,s1) = IC s1 + 1 by A6,A17,
SCMPDS_2:55;
        hence IC Exec(i,s1) + n = IC Exec(i,s2) by A7,A17,SCMPDS_2:55;
      end;
    end;
    now
      let a;
      thus Exec(i, s1).a = s1.a by A17,SCMPDS_2:55
        .=s2.a by A5,Th7
        .=Exec(i, s2).a by A17,SCMPDS_2:55;
    end;
    hence thesis by Th7;
  end;
  suppose
    Ci = 5;
    then consider a,k1,k2 such that
A21: i = (a,k1)<=0_goto k2 and
A22: m+k2 >= 0 by A2;
    hereby
      per cases;
      suppose
A23:    s1.DataLoc(s1.a,k1) <= 0;
        then
A24:    s2.DataLoc(s2.a,k1) <= 0 by A6;
        IC Exec(i,s1) = ICplusConst(s1,k2) by A21,A23,SCMPDS_2:56;
        hence IC Exec(i,s1) + n = ICplusConst(s2,k2) by A1,A4,A22,Th25
          .= IC Exec(i,s2) by A21,A24,SCMPDS_2:56;
      end;
      suppose
        s1.DataLoc(s1.a,k1) > 0;
        then s2.DataLoc(s2.a,k1) > 0 & IC Exec(i,s1) = IC s1 + 1 by A6,A21,
SCMPDS_2:56;
        hence IC Exec(i,s1) + n = IC Exec(i,s2) by A7,A21,SCMPDS_2:56;
      end;
    end;
    now
      let a;
      thus Exec(i, s1).a = s1.a by A21,SCMPDS_2:56
        .=s2.a by A5,Th7
        .=Exec(i, s2).a by A21,SCMPDS_2:56;
    end;
    hence thesis by Th7;
  end;
  suppose
    Ci = 6;
    then consider a,k1,k2 such that
A25: i = (a,k1)>=0_goto k2 and
A26: m+k2 >= 0 by A2;
    hereby
      per cases;
      suppose
A27:    s1.DataLoc(s1.a,k1) >= 0;
        then
A28:    s2.DataLoc(s2.a,k1) >= 0 by A6;
        IC Exec(i,s1) = ICplusConst(s1,k2) by A25,A27,SCMPDS_2:57;
        hence IC Exec(i,s1) + n = ICplusConst(s2,k2) by A1,A4,A26,Th25
          .= IC Exec(i,s2) by A25,A28,SCMPDS_2:57;
      end;
      suppose
        s1.DataLoc(s1.a,k1) < 0;
        then s2.DataLoc(s2.a,k1) < 0 & IC Exec(i,s1) = IC s1 + 1 by A6,A25,
SCMPDS_2:57;
        hence IC Exec(i,s1) + n = IC Exec(i,s2) by A7,A25,SCMPDS_2:57;
      end;
    end;
    now
      let a;
      thus Exec(i, s1).a = s1.a by A25,SCMPDS_2:57
        .=s2.a by A5,Th7
        .=Exec(i, s2).a by A25,SCMPDS_2:57;
    end;
    hence thesis by Th7;
  end;
  suppose
A29: Ci = 7;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,k1,k2 such that
A30: i = (a,k1) := k2 by A29,SCMPDS_2:33;
    now
      let b;
      per cases;
      suppose
A31:    DataLoc(s1.a,k1)=b;
        then
A32:    DataLoc(s2.a,k1)=b by A5,Th7;
        thus Exec(i, s1).b= k2 by A30,A31,SCMPDS_2:46
          .=Exec(i,s2).b by A30,A32,SCMPDS_2:46;
      end;
      suppose
A33:    DataLoc(s1.a,k1)<>b;
        then
A34:    DataLoc(s2.a,k1)<>b by A5,Th7;
        thus Exec(i,s1).b = s1.b by A30,A33,SCMPDS_2:46
          .=s2.b by A5,Th7
          .=Exec(i,s2).b by A30,A34,SCMPDS_2:46;
      end;
    end;
    hence thesis by Th7;
  end;
  suppose
A35: Ci = 8;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,k1,k2 such that
A36: i = AddTo(a,k1,k2) by A35,SCMPDS_2:34;
    now
      let b;
      per cases;
      suppose
A37:    DataLoc(s1.a,k1)=b;
        then
A38:    DataLoc(s2.a,k1)=b by A5,Th7;
        thus Exec(i, s1).b= s1.DataLoc(s1.a,k1)+k2 by A36,A37,SCMPDS_2:48
          .= s2.DataLoc(s2.a,k1)+k2 by A6
          .=Exec(i,s2).b by A36,A38,SCMPDS_2:48;
      end;
      suppose
A39:    DataLoc(s1.a,k1)<>b;
        then
A40:    DataLoc(s2.a,k1)<>b by A5,Th7;
        thus Exec(i,s1).b = s1.b by A36,A39,SCMPDS_2:48
          .=s2.b by A5,Th7
          .=Exec(i,s2).b by A36,A40,SCMPDS_2:48;
      end;
    end;
    hence thesis by Th7;
  end;
  suppose
A41: Ci = 9;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,b,k1,k2 such that
A42: i = AddTo(a,k1,b,k2) by A41,SCMPDS_2:35;
    now
      let c;
      per cases;
      suppose
A43:    DataLoc(s1.a,k1)=c;
        then
A44:    DataLoc(s2.a,k1)=c by A5,Th7;
        thus Exec(i, s1).c = s1.DataLoc(s1.a,k1)+s1.DataLoc(s1.b,k2) by A42,A43
,SCMPDS_2:49
          .= s2.DataLoc(s2.a,k1)+s1.DataLoc(s1.b,k2) by A6
          .= s2.DataLoc(s2.a,k1)+s2.DataLoc(s2.b,k2) by A6
          .=Exec(i,s2).c by A42,A44,SCMPDS_2:49;
      end;
      suppose
A45:    DataLoc(s1.a,k1)<>c;
        then
A46:    DataLoc(s2.a,k1)<>c by A5,Th7;
        thus Exec(i,s1).c = s1.c by A42,A45,SCMPDS_2:49
          .=s2.c by A5,Th7
          .=Exec(i,s2).c by A42,A46,SCMPDS_2:49;
      end;
    end;
    hence thesis by Th7;
  end;
  suppose
A47: Ci = 10;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,b,k1,k2 such that
A48: i = SubFrom(a,k1,b,k2) by A47,SCMPDS_2:36;
    now
      let c;
      per cases;
      suppose
A49:    DataLoc(s1.a,k1)=c;
        then
A50:    DataLoc(s2.a,k1)=c by A5,Th7;
        thus Exec(i, s1).c = s1.DataLoc(s1.a,k1)-s1.DataLoc(s1.b,k2) by A48,A49
,SCMPDS_2:50
          .= s2.DataLoc(s2.a,k1)-s1.DataLoc(s1.b,k2) by A6
          .= s2.DataLoc(s2.a,k1)-s2.DataLoc(s2.b,k2) by A6
          .=Exec(i,s2).c by A48,A50,SCMPDS_2:50;
      end;
      suppose
A51:    DataLoc(s1.a,k1)<>c;
        then
A52:    DataLoc(s2.a,k1)<>c by A5,Th7;
        thus Exec(i,s1).c = s1.c by A48,A51,SCMPDS_2:50
          .=s2.c by A5,Th7
          .=Exec(i,s2).c by A48,A52,SCMPDS_2:50;
      end;
    end;
    hence thesis by Th7;
  end;
  suppose
A53: Ci = 11;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,b,k1,k2 such that
A54: i = MultBy(a,k1,b,k2) by A53,SCMPDS_2:37;
    now
      let c;
      per cases;
      suppose
A55:    DataLoc(s1.a,k1)=c;
        then
A56:    DataLoc(s2.a,k1)=c by A5,Th7;
        thus Exec(i, s1).c = s1.DataLoc(s1.a,k1)*s1.DataLoc(s1.b,k2) by A54,A55
,SCMPDS_2:51
          .= s2.DataLoc(s2.a,k1)*s1.DataLoc(s1.b,k2) by A6
          .= s2.DataLoc(s2.a,k1)*s2.DataLoc(s2.b,k2) by A6
          .=Exec(i,s2).c by A54,A56,SCMPDS_2:51;
      end;
      suppose
A57:    DataLoc(s1.a,k1)<>c;
        then
A58:    DataLoc(s2.a,k1)<>c by A5,Th7;
        thus Exec(i,s1).c = s1.c by A54,A57,SCMPDS_2:51
          .=s2.c by A5,Th7
          .=Exec(i,s2).c by A54,A58,SCMPDS_2:51;
      end;
    end;
    hence thesis by Th7;
  end;
  suppose
A59: Ci = 12;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,b,k1,k2 such that
A60: i = Divide(a,k1,b,k2) by A59,SCMPDS_2:38;
    now
      let c;
      per cases;
      suppose
A61:    DataLoc(s1.b,k2)=c;
        then
A62:    DataLoc(s2.b,k2)=c by A5,Th7;
        thus Exec(i, s1).c = s1.DataLoc(s1.a,k1) mod s1.DataLoc(s1.b,k2) by A60
,A61,SCMPDS_2:52
          .= s2.DataLoc(s2.a,k1) mod s1.DataLoc(s1.b,k2) by A6
          .= s2.DataLoc(s2.a,k1) mod s2.DataLoc(s2.b,k2) by A6
          .= Exec(i,s2).c by A60,A62,SCMPDS_2:52;
      end;
      suppose
A63:    DataLoc(s1.b,k2)<>c;
        then
A64:    DataLoc(s2.b,k2)<>c by A5,Th7;
        hereby
          per cases;
          suppose
A65:        DataLoc(s1.a,k1)<>c;
            then
A66:        DataLoc(s2.a,k1)<>c by A5,Th7;
            thus Exec(i, s1).c = s1.c by A60,A63,A65,SCMPDS_2:52
              .=s2.c by A5,Th7
              .=Exec(i,s2).c by A60,A64,A66,SCMPDS_2:52;
          end;
          suppose
A67:        DataLoc(s1.a,k1)=c;
            then
A68:        DataLoc(s2.a,k1)=c by A5,Th7;
            thus Exec(i, s1).c = s1.DataLoc(s1.a,k1) div s1.DataLoc(s1.b,k2)
            by A60,A63,A67,SCMPDS_2:52
              .= s2.DataLoc(s2.a,k1) div s1.DataLoc(s1.b,k2) by A6
              .= s2.DataLoc(s2.a,k1) div s2.DataLoc(s2.b,k2) by A6
              .= Exec(i,s2).c by A60,A64,A68,SCMPDS_2:52;
          end;
        end;
      end;
    end;
    hence thesis by Th7;
  end;
  suppose
A69: Ci = 13;
    hence IC Exec(i,s1) + n = IC Exec(i,s2) by A8;
    consider a,b,k1,k2 such that
A70: i = (a,k1):=(b,k2) by A69,SCMPDS_2:39;
    now
      let c;
      per cases;
      suppose
A71:    DataLoc(s1.a,k1)=c;
        then
A72:    DataLoc(s2.a,k1)=c by A5,Th7;
        thus Exec(i, s1).c = s1.DataLoc(s1.b,k2) by A70,A71,SCMPDS_2:47
          .= s2.DataLoc(s2.b,k2) by A6
          .=Exec(i,s2).c by A70,A72,SCMPDS_2:47;
      end;
      suppose
A73:    DataLoc(s1.a,k1)<>c;
        then
A74:    DataLoc(s2.a,k1)<>c by A5,Th7;
        thus Exec(i,s1).c = s1.c by A70,A73,SCMPDS_2:47
          .=s2.c by A5,Th7
          .=Exec(i,s2).c by A70,A74,SCMPDS_2:47;
      end;
    end;
    hence thesis by Th7;
  end;
end;
