reserve s for State of SCM+FSA,
  a, c for read-write Int-Location,
  aa, bb, cc,
  dd, x for Int-Location,
  f for FinSeq-Location,
  I, J for MacroInstruction of SCM+FSA,
  Ig for good MacroInstruction of SCM+FSA,
  i, k for Nat,
  p for Instruction-Sequence of SCM+FSA;
reserve I for MacroInstruction of SCM+FSA;

theorem Th27:
  s.intloc 0 = 1 implies FinSeqMin(f, aa, bb, c) is_halting_on s,p
proof
  assume
A1: s.intloc 0 = 1;
  set a = aa, b = bb;
  set aux1 = 1-stRWNotIn {a, b, c};
  set aux2 = 2-ndRWNotIn {a, b, c};
  set cv = 3-rdRWNotIn {a, b, c};
  set i0 = c := a;
  set i10 = aux1 := (f, cv);
  set i11 = aux2 := (f, c);
  set I12 = if>0(aux2, aux1, Macro (c := cv), Stop SCM+FSA);
  set I1B = i10 ";" i11 ";" I12;
  set I1 = for-up ( cv, a, b, I1B);
  set s1 = IExec(Macro i0,p,s),
      p1 = p;
A2: s1.intloc 0 = Exec(i0, Initialized s).intloc 0 by SCMFSA6C:5
    .= (Initialized s). intloc 0 by SCMFSA_2:63
    .= 1 by SCMFSA_M:9;
A3: Macro i0 is_halting_on Initialized s,p by SCMFSA7B:19;
  I1 is_halting_on s1,p1 by A2,Th24;
  then FinSeqMin(f, aa, bb, c) is_halting_on Initialized s,p by A3,SFMASTR1:3;
  hence thesis by A1,SCMFSA8B:42;
end;
