reserve s for State of SCM+FSA,
  I for MacroInstruction of SCM+FSA,
  a for read-write Int-Location;
reserve i,j,k,n for Nat;
reserve P,P1,P2,Q for Instruction-Sequence of SCM+FSA;

theorem Th1:
  for s being State of SCM+FSA, I being Program of SCM+FSA st I
  is_halting_on Initialized s,P holds for a be Int-Location
   holds IExec(I,P,s).a =
    Comput(P +* I,(Initialize Initialized s),
      LifeSpan(P +* I,Initialize Initialized s)).a
proof
  let s be State of SCM+FSA,I be Program of SCM+FSA;
  set s0 = Initialized s, s1 = Initialize s0, A = NAT,
      P1 = P +* I;
  assume I is_halting_on s0,P;
  then
A1: P1 halts_on s1 by SCMFSA7B:def 7;
  hereby
    let a be Int-Location;
      Initialized s = s1 by MEMSTR_0:44;
    hence IExec(I,P,s).a = Result(P1,s1).a by SCMFSA6B:def 1
      .= Comput(P1, s1,LifeSpan(P1,s1)).a by A1,EXTPRO_1:23;
  end;
end;
