reserve V for RealLinearSpace,
  u,u1,u2,v,v1,v2,w,w1,x,y for VECTOR of V,
  a,a1,a2,b,b1,b2,c1,c2,n,k1,k2 for Real;

theorem
  Gen x,y & u,v,u1,v1 are_COrte_wrt x,y & u,v,v1,u1 are_COrte_wrt x,y
  implies u=v or u1=v1
proof
  assume
A1: Gen x,y;
  assume that
A2: u,v,u1,v1 are_COrte_wrt x,y and
A3: u,v,v1,u1 are_COrte_wrt x,y;
  assume that
A4: u<>v and
A5: u1<>v1;
A6: Orte(x,y,u),Orte(x,y,v) // u1,v1 by A2;
A7: Orte(x,y,u),Orte(x,y,v) // v1,u1 by A3;
  Orte(x,y,u) <> Orte(x,y,v) by A1,A4,Th13;
  hence contradiction by A5,A6,A7,ANALOAF:10,11;
end;
