reserve V for RealLinearSpace,
  u,u1,u2,v,v1,v2,w,w1,x,y for VECTOR of V,
  a,a1,a2,b,b1,b2,c1,c2,n,k1,k2 for Real;

theorem
  Gen x,y & u,v,u1,v1 are_COrte_wrt x,y & u,v,u1,w are_COrte_wrt x,y
  implies u,v,v1,w are_COrte_wrt x,y or u,v,w,v1 are_COrte_wrt x,y
proof
  assume that
A1: Gen x,y and
A2: u,v,u1,v1 are_COrte_wrt x,y and
A3: u,v,u1,w are_COrte_wrt x,y;
A4: Orte(x,y,u),Orte(x,y,v) // u1,v1 by A2;
A5: Orte(x,y,u),Orte(x,y,v) // u1,w by A3;
  now
    assume
A6: u<>v;
    now
      assume that
A7:   u1<>v1 and
A8:   u1<>w;
A9:   u1,v1 // u1,w by A1,A4,A5,A6,Th13,ANALOAF:11;
A10:  now
        assume
A11:    u1,v1 // v1,w;
        u1,v1 // Orte(x,y,u),Orte(x,y,v) by A4,ANALOAF:12;
        then Orte(x,y,u),Orte(x,y,v) // v1,w by A7,A11,ANALOAF:11;
        hence thesis;
      end;
      now
        assume
A12:    u1,w // w,v1;
        u1,w // Orte(x,y,u),Orte(x,y,v) by A5,ANALOAF:12;
        then Orte(x,y,u),Orte(x,y,v) // w,v1 by A8,A12,ANALOAF:11;
        hence thesis;
      end;
      hence thesis by A9,A10,ANALOAF:14;
    end;
    hence thesis by A2,A3;
  end;
  hence thesis by Th20;
end;
