
theorem Th33:
  for S1,S2,S being non void Circuit-like non empty
ManySortedSign st InnerVertices S2 misses InputVertices S1 & S = S1+*S2 for A1
  being non-empty Circuit of S1, A2 being non-empty Circuit of S2 for A being
non-empty Circuit of S st A1 tolerates A2 & A = A1+*A2 for s being State of A,
s1 being State of A1, s2 being State of A2 st s1 = s|the carrier of S1 & s2 = s
  |the carrier of S2 holds Following s = (Following s2)+*(Following s1)
proof
  let S1,S2,S be non void Circuit-like non empty ManySortedSign such that
A1: InnerVertices S2 misses InputVertices S1 and
A2: S = S1+*S2;
  let A1 be non-empty Circuit of S1, A2 be non-empty Circuit of S2;
  let A be non-empty Circuit of S such that
A3: A1 tolerates A2 and
A4: A = A1+*A2;
  S1 tolerates S2 by A3;
  then
A5: S = S2+*S1 by A2,Th5;
  A = A2+*A1 by A3,A4,Th22;
  hence thesis by A1,A3,A5,Th19,Th32;
end;
