
theorem Th33:
  for S1,S2 being unsplit gate`1=arity gate`2isBoolean non void
  non empty ManySortedSign st InnerVertices S1 misses InputVertices S2 for A1
being Boolean gate`2=den Circuit of S1 for A2 being Boolean gate`2=den Circuit
  of S2 for s being State of A1+*A2, s2 being State of A2 st s2 = s|the carrier
  of S2 holds for v being set st v in the carrier of S2 for n being Nat holds (
  Following(s,n)).v = (Following(s2,n)).v
proof
  let S1,S2 be unsplit gate`1=arity gate`2isBoolean non void non empty
  ManySortedSign such that
A1: InnerVertices S1 misses InputVertices S2;
  let A1 be Boolean gate`2=den Circuit of S1;
  let A2 be Boolean gate`2=den Circuit of S2;
  let s be State of A1+*A2, s1 be State of A2 such that
A2: s1 = s|the carrier of S2;
  let v be set;
  assume
A3: v in the carrier of S2;
  let n be Nat;
A4: the carrier of S2 = dom Following(s1,n) by CIRCUIT1:3;
  Following(s,n)|the carrier of S2 = Following(s1,n) by A1,A2,Th31;
  hence thesis by A3,A4,FUNCT_1:47;
end;
