reserve m,n for Nat,
  I for Program of SCM+FSA,
  s,s1,s2 for State of SCM+FSA,
  a for Int-Location,
  f for FinSeq-Location,
  p,p1,p2 for Instruction-Sequence of SCM+FSA;

theorem Th33:
  for s being State of SCM+FSA,
      I,J being really-closed InitHalting MacroInstruction of
SCM+FSA, a being read-write Int-Location holds if=0(a,I,J) is InitHalting & (s.
  a = 0 implies IExec(if=0(a,I,J),p,s) = IExec(I,p,s) +* Start-At((card I +
card J + 3),SCM+FSA)) &
 (s.a <> 0 implies IExec(if=0(a,I,J),p,s) = IExec(J,p,s) +* Start-At(
   (card I + card J + 3),SCM+FSA))
proof
  let s be State of SCM+FSA;
  let I,J be InitHalting really-closed MacroInstruction of SCM+FSA;
  let a be read-write Int-Location;
  now
    let s be State of SCM+FSA;
    assume iS c= s;
    then
A1: s = Initialized s by FUNCT_4:98;
    let p;
    assume if=0(a,I,J) c= p;
    then
A2: p = p +* if=0(a,I,J) by FUNCT_4:98;
A3:
    J is_halting_onInit s,p by Th23;
A4:
    I is_halting_onInit s,p by Th23;
    per cases;
    suppose
      s.a = 0;
      then if=0(a,I,J) is_halting_onInit s,p by A4,Th29;
      hence p halts_on s by A1,A2;
    end;
    suppose
      s.a <> 0;
      then if=0(a,I,J) is_halting_onInit s,p by A3,Th31;
      hence p halts_on s by A1,A2;
    end;
  end;
  hence if=0(a,I,J) is InitHalting;
  I is_halting_onInit s,p by Th23;
  hence s.a = 0 implies IExec(if=0(a,I,J),p,s) = IExec(I,p,s) +* Start-At((
  card I + card J + 3),SCM+FSA) by Th30;
  J is_halting_onInit s,p by Th23;
  hence thesis by Th32;
end;
