
theorem
  for x,y,z being set st z <> [<*x,y*>,xor2] & x <> [<*y,z*>,and2] & y
<> [<*z,x*>,and2] & z <> [<*x,y*>,and2] for s being State of BitGFA0Circ(x,y,z)
  for a1,a2,a3 being Element of BOOLEAN st a1 = s.x & a2 = s.y & a3 = s.z holds
Following(s,2).GFA0AdderOutput(x,y,z) = a1 'xor' a2 'xor' a3 & Following(s,2).
  GFA0CarryOutput(x,y,z) = a1 '&' a2 'or' a2 '&' a3 'or' a3 '&' a1
proof
  set f1 = and2, f2 = and2, f3 = and2;
  set f0 = xor2;
  let x,y,z be set such that
A1: z <> [<*x,y*>,f0] and
A2: x <> [<*y,z*>,f2] & y <> [<*z,x*>,f3] & z <> [<*x,y*>,f1];
  set S2 = GFA0CarryStr(x,y,z);
  set S1 = GFA0AdderStr(x,y,z);
  InputVertices S1 = {x,y,z} by A1,FACIRC_1:57;
  then
A3: InputVertices S1 = InputVertices S2 by A2,Th14;
  set A2 = GFA0CarryCirc(x,y,z);
  set A1 = GFA0AdderCirc(x,y,z);
  set A = BitGFA0Circ(x,y,z);
  let s be State of A;
  let a1,a2,a3 be Element of BOOLEAN;
  assume that
A4: a1 = s.x and
A5: a2 = s.y and
A6: a3 = s.z;
  reconsider s1 = s|the carrier of S1 as State of A1 by FACIRC_1:26;
A7: dom s1 = the carrier of S1 by CIRCUIT1:3;
  z in the carrier of S1 by FACIRC_1:60;
  then
A8: a3 = s1.z by A6,A7,FUNCT_1:47;
  y in the carrier of S1 by FACIRC_1:60;
  then
A9: a2 = s1.y by A5,A7,FUNCT_1:47;
  reconsider t = s as State of A1+*A2;
  InnerVertices S2 misses InputVertices S2 by XBOOLE_1:79;
  then
A10: Following(t,2).GFA0AdderOutput(x,y,z) = Following(s1,2).GFA0AdderOutput
  (x,y,z) by A3,FACIRC_1:32;
  reconsider s2 = s|the carrier of S2 as State of A2 by FACIRC_1:26;
A11: dom s2 = the carrier of S2 by CIRCUIT1:3;
  x in the carrier of S1 by FACIRC_1:60;
  then a1 = s1.x by A4,A7,FUNCT_1:47;
  hence Following(s,2).GFA0AdderOutput(x,y,z) = a1 'xor' a2 'xor' a3 by A1,A9
,A8,A10,Th30;
  InnerVertices S1 misses InputVertices S1 by XBOOLE_1:79;
  then
A12: Following(t,2).GFA0CarryOutput(x,y,z) = Following(s2,2).GFA0CarryOutput
  (x,y,z) by A3,FACIRC_1:33;
  z in the carrier of S2 by Th16;
  then
A13: a3 = s2.z by A6,A11,FUNCT_1:47;
  y in the carrier of S2 by Th16;
  then
A14: a2 = s2.y by A5,A11,FUNCT_1:47;
  x in the carrier of S2 by Th16;
  then a1 = s2.x by A4,A11,FUNCT_1:47;
  hence thesis by A2,A14,A13,A12,Th22;
end;
