reserve s for State of SCM+FSA,
  I for MacroInstruction of SCM+FSA,
  a for read-write Int-Location;
reserve i,j,k,n for Nat;
reserve P,P1,P2,Q for Instruction-Sequence of SCM+FSA;

theorem
  for a being Int-Location,
  I being really-closed MacroInstruction of SCM+FSA,
       s being State of SCM+FSA,k being Nat
 st I is_halting_onInit s,P &
  k < LifeSpan(P +* I,Initialized s) &
 IC Comput(P +* while>0(a,I), Initialized s,1 + k)
  = IC Comput(P +* I, Initialized s,k) + 3 &
 DataPart Comput(P +* while>0(a,I), Initialized s,1 + k)
 = DataPart Comput(P +* I, Initialized s,k)
 holds IC Comput(P +* while>0(a,I), Initialized s,1 + k+1)
  = IC Comput(P +* I, Initialized s,k+1) + 3 &
  DataPart Comput(P +* while>0(a,I), Initialized s,1 + k+1)
 = DataPart Comput(P +* I, Initialized s,k+1)
proof
  let a be Int-Location,I be really-closed MacroInstruction of SCM+FSA;
  set D = Data-Locations SCM+FSA;
  let s be State of SCM+FSA,k be Nat;
  set s0=Initialized s,
      Pw = P +* while>0(a,I), PI = P +* I,
      s0I= Initialize s0, sK1= Comput(Pw, s0,1 + k),
      sK2= Comput(PI, s0,k), l3=IC Comput(PI, s0,k);
A1: s0=s0I by MEMSTR_0:44;
  assume I is_halting_onInit s,P;
  then
A2: I is_halting_on s0,P by SCM_HALT:31;
  assume
A3: k < LifeSpan(PI,s0);
  assume
A4: IC Comput(Pw, s0,1 + k)=l3 + 3;
  assume
A5: DataPart sK1 = DataPart sK2;
  hence IC Comput(Pw, s0,1 + k+1) = IC Comput(PI,s0,k+1) + 3
    by A3,A4,A2,A1,SCMFSA_9:39;
  thus thesis by A3,A4,A5,A2,A1,SCMFSA_9:39;
end;
