reserve J,J1,K for Element of Segm 13,
  b,b1,b2,c,c1,c2 for Element of SCM+FSA-Data-Loc,
  f,f1,f2 for Element of SCM+FSA-Data*-Loc;
reserve k for Nat,
  J,K,L for Element of Segm 13,
  O,P,R for Element of Segm 9;
reserve da for Int-Location,
  fa for FinSeq-Location,
  x,y for set;
reserve la,lb for Nat,
  La for Nat,
  i for Instruction of SCM+FSA,
  I for Instruction of SCM,
  l for Nat,
  LA,LB for Nat,
  dA,dB,dC,dD for Element of SCM+FSA-Data-Loc,
  DA,DB,DC for Element of SCM-Data-Loc,
  fA,fB,fC for Element of SCM+FSA-Data*-Loc,
  f,g for FinSeq-Location,
  A,B for Data-Location,
  a,b,c,db for Int-Location;
reserve S for State of SCM,
  s,s1 for State of SCM+FSA;

theorem Th63:
  (s.a = 0 implies Exec(a =0_goto l, s).IC SCM+FSA = l) & (s.a <>
  0 implies Exec(a=0_goto l, s).IC SCM+FSA = IC s + 1) & (for c holds Exec(a
  =0_goto l, s).c = s.c) & for f holds Exec(a=0_goto l, s).f = s.f
proof
  consider A such that
A1: a = A and
A2: a =0_goto l = A =0_goto l by Def12;
  reconsider S = s|SCM-Memory as State of SCM by Th42;
A3: Exec(a =0_goto l, s)=s +* Exec(A =0_goto l, S) by A2,Th44;
  hereby
    assume s.a = 0;
    then
A4: S.A = 0 by A1,Th48;
    thus Exec(a =0_goto l, s).IC SCM+FSA = Exec(A =0_goto l, S).IC SCM by A3
,Th46
      .= l by A4,AMI_3:8;
  end;
  hereby
    assume s.a <> 0;
    then
A5: S.A <> 0 by A1,Th48;
    thus Exec(a =0_goto l, s).IC SCM+FSA = Exec(A =0_goto l, S).IC SCM by A3
,Th46
      .= IC S + 1 by A5,AMI_3:8
      .= IC s + 1 by Th55;
  end;
  hereby
    let c;
    reconsider C = c as Data-Location by Th5;
    thus Exec(a =0_goto l, s).c = Exec(A =0_goto l, S).C by A3,Th47
      .= S.C by AMI_3:8
      .= s.c by Th48;
  end;
  let f;
A6: not f in dom Exec(A =0_goto l, S) by Th37;
  thus Exec(a =0_goto l, s).f
    = s.f by A3,A6,FUNCT_4:11;
end;
