
theorem Th7:
  for S1,S2 being non void Circuit-like non empty ManySortedSign
  st InputVertices S1 misses InnerVertices S2 & InputVertices S2 misses
  InnerVertices S1 for S being non void Circuit-like non empty ManySortedSign
  st S=S1 +* S2 for A1 being non-empty Circuit of S1 for A2 being non-empty
  Circuit of S2 st A1 tolerates A2 for A being non-empty Circuit of S st A = A1
+* A2 for s being State of A for s1 being State of A1 for s2 being State of A2
st s1=s|the carrier of S1 & s2=s|the carrier of S2 & s1 is stabilizing & s2 is
  stabilizing holds s is stabilizing
proof
  let S1,S2 be non void Circuit-like non empty ManySortedSign such that
A1: InputVertices S1 misses InnerVertices S2 & InputVertices S2 misses
  InnerVertices S1;
  let S be non void Circuit-like non empty ManySortedSign such that
A2: S=S1 +* S2;
  let A1 be non-empty Circuit of S1;
  let A2 be non-empty Circuit of S2;
  assume
A3: A1 tolerates A2;
  let A be non-empty Circuit of S such that
A4: A = A1 +* A2;
  let s be State of A;
  let s1 be State of A1;
  let s2 be State of A2;
  assume that
A5: s1=s|the carrier of S1 & s2=s|the carrier of S2 and
A6: s1 is stabilizing and
A7: s2 is stabilizing;
  consider n1 being Element of NAT such that
A8: Following(s1,n1) is stable by A6;
  consider n2 being Element of NAT such that
A9: Following(s2,n2) is stable by A7;
  Following(s,max(n1,n2)) is stable by A1,A2,A3,A4,A5,A8,A9,CIRCCMB2:22;
  hence thesis;
end;
