
theorem
  for ap,bp,cp being non pair set for dp,cin being set for s being State
of BitFTA0Circ(ap,bp,cp,dp,cin) for a1,a2,a3 being Element of BOOLEAN st a1 = s
.ap & a2 = s.bp & a3 = s.cp holds Following(s,2).BitFTA0CarryOutput(ap,bp,cp,dp
  ,cin) = (a1 '&' a2) 'or' (a2 '&' a3) 'or' (a3 '&' a1) & Following(s,2).
  BitFTA0AdderOutputI(ap,bp,cp,dp,cin) = a1 'xor' a2 'xor' a3
proof
  let ap,bp,cp be non pair set;
  let dp,cin be set;
  let s be State of BitFTA0Circ(ap,bp,cp,dp,cin);
  set S1 = BitGFA0Str(ap,bp,cp);
  set C1 = BitGFA0Circ(ap,bp,cp);
  set A1 = GFA0AdderOutput(ap,bp,cp);
  set A2 = GFA0CarryOutput(ap,bp,cp);
  set S2 = BitGFA0Str(A1,cin,dp);
  set C2 = BitGFA0Circ(A1,cin,dp);
  let a1,a2,a3 be Element of BOOLEAN such that
A1: a1 = s.ap and
A2: a2 = s.bp and
A3: a3 = s.cp;
  reconsider s1 = s|the carrier of S1 as State of C1 by FACIRC_1:26;
A4: dom s1 = the carrier of S1 by CIRCUIT1:3;
  ap in the carrier of S1 by GFACIRC1:36;
  then
A5: a1 = s1.ap by A1,A4,FUNCT_1:47;
  reconsider t = s as State of C1+*C2;
A6: InputVertices S1 misses InnerVertices S2 by Lm2;
  cp in the carrier of S1 by GFACIRC1:36;
  then
A7: a3 = s1.cp by A3,A4,FUNCT_1:47;
  bp in the carrier of S1 by GFACIRC1:36;
  then
A8: a2 = s1.bp by A2,A4,FUNCT_1:47;
  A2 in the carrier of S1 by GFACIRC1:36;
  then Following(t,2).GFA0CarryOutput(ap,bp,cp) = Following(s1,2).
  GFA0CarryOutput(ap,bp,cp) by A6,FACIRC_1:32;
  hence
  Following(s,2).BitFTA0CarryOutput(ap,bp,cp,dp,cin) = (a1 '&' a2) 'or' (
  a2 '&' a3) 'or' (a3 '&' a1) by A5,A8,A7,GFACIRC1:39;
  A1 in the carrier of S1 by GFACIRC1:36;
  then Following(t,2).GFA0AdderOutput(ap,bp,cp) = Following(s1,2).
  GFA0AdderOutput(ap,bp,cp) by A6,FACIRC_1:32;
  hence thesis by A5,A8,A7,GFACIRC1:39;
end;
