reserve a, b, d1, d2, d3, d4 for Int-Location,
  A, B for Data-Location,
  f, f1, f2, f3 for FinSeq-Location,
  il, i1, i2 for Nat,
  L for Nat,
  I for Instruction of SCM+FSA,
  s,s1,s2 for State of SCM+FSA,
  T for InsType of the InstructionsF of SCM+FSA,
  k for Nat;

theorem Th7:
  a=0_goto il = [7, <* il*>,<*a *>]
proof
  ex A st A = a & A=0_goto il = a=0_goto il by SCMFSA_2:def 14;
  hence thesis;
end;
