reserve s, s1, s2 for State of SCM+FSA,
  p, p1 for Instruction-Sequence of SCM+FSA,
  a, b for Int-Location,
  d for read-write Int-Location,
  f for FinSeq-Location,
  I for MacroInstruction of SCM+FSA,
  J for good MacroInstruction of SCM+FSA,
  k, m for Nat;

theorem
  {b} \/ UsedILoc I c= UsedILoc times(b, I)
proof
  set a =b;
  set aux = 1-stRWNotIn ({a} \/ UsedILoc I);
  UsedILoc times(a,I) = UsedIntLoc (aux := a) \/ UsedILoc while>0(aux,
  I ";" SubFrom(aux, intloc 0)) by SF_MASTR:29
    .= {aux, a} \/ UsedILoc while>0(aux, I ";" SubFrom(aux, intloc 0)) by
SF_MASTR:14
    .= {aux, a} \/ ({aux} \/ UsedILoc (I ";" SubFrom(aux,intloc 0))) by
SCMFSA9A:24
    .= {aux, a} \/ {aux} \/ UsedILoc (I ";" SubFrom(aux, intloc 0)) by
XBOOLE_1:4
    .= {aux, a} \/ UsedILoc (I ";" SubFrom(aux, intloc 0)) by ZFMISC_1:9
    .= {aux, a} \/ ((UsedILoc I) \/ UsedIntLoc SubFrom(aux, intloc 0)) by
SF_MASTR:30
    .= {aux, a} \/ ((UsedILoc I) \/ {aux, intloc 0}) by SF_MASTR:14
    .= {aux, a} \/ (UsedILoc I) \/ {aux, intloc 0} by XBOOLE_1:4;
  then
A1: {aux, a} \/ UsedILoc I c= UsedILoc times(a, I) by XBOOLE_1:7;
  UsedILoc I c= {aux, a} \/ UsedILoc I by XBOOLE_1:7;
  then
A2: UsedILoc I c= UsedILoc times(a, I) by A1,XBOOLE_1:1;
  {a} c= {aux, a} & {aux, a} c= {aux, a} \/ UsedILoc I by XBOOLE_1:7,ZFMISC_1:7
;
  then {a} c= {aux, a} \/ UsedILoc I by XBOOLE_1:1;
  then {a} c= UsedILoc times(a, I) by A1,XBOOLE_1:1;
  hence thesis by A2,XBOOLE_1:8;
end;
