reserve s for State of SCM+FSA,
  I for MacroInstruction of SCM+FSA,
  a for read-write Int-Location;
reserve i,j,k,n for Nat;
reserve P,P1,P2,Q for Instruction-Sequence of SCM+FSA;

theorem ::SCM_9_36
  for s being State of SCM+FSA,
      I being really-closed MacroInstruction of SCM+FSA,
      a be read-write Int-Location
   st I is_halting_onInit s,P & s.a >  0
  for k being Nat st
   k <= LifeSpan(P +* I,Initialized s) + 2
  holds IC Comput(P +* while>0(a,I), Initialized s,k) in dom while>0(a,I)
proof
  let s be State of SCM+FSA, I be really-closed MacroInstruction of SCM+FSA,
      a be read-write Int-Location;
  set s0=Initialized s, IA=Start-At(0,SCM+FSA);
  assume I is_halting_onInit s,P;
  then
A1:  P +* I halts_on Initialized s;
  Initialized s = Initialize Initialized s by MEMSTR_0:44;
  then
A2: I is_halting_on s0,P by A1,SCMFSA7B:def 7;
  assume s.a >0;
  then
A3: s0.a > 0 by SCMFSA_M:37;
  hereby
    let k be Nat;
A4: Initialized s = Initialize Initialized s by MEMSTR_0:44;
    assume
    k <= LifeSpan(P +* I,Initialized s) + 2;
    hence
    IC Comput(P +* while>0(a,I), Initialized s,k)
     in dom while>0(a,I) by A4,A2,A3,SCMFSA_9:42;
  end;
end;
