theorem Th7:
  u,v are_Ort_wrt w,y implies a*u,v are_Ort_wrt w,y & u,b*v are_Ort_wrt w,y
proof
A1: v = 1*v & u = 1*u by RLVECT_1:def 8;
  assume u,v are_Ort_wrt w,y;
  hence thesis by A1,Th6;
end;
